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Attorney: Limanek; Stephen J., Chadurjian; Mark F.


Number of patents: 5
Last date: May 17, 1994

NumberTitleIssue Date
5313424Module level electronic redundancy
A redundancy system formed on a semiconductor chip is provided which includes circuits for testing a memory array to locate a faulty element therein, a register for storing an address of the faulty element and electrical fuses blown in response to binary ...
05/17/1994
5265056Signal margin testing system for dynamic RAM
A signal margin testing system is provided for a memory having a word line voltage boosting circuit which uses a test mode decode circuit to selectively disable the word line boosting circuit and then read out data from storage cells in the memory....
11/23/1993
5226732Emissivity independent temperature measurement systems
An improved contactless temperature measurement system is provided which includes a workpiece, a chamber containing the workpiece with the walls thereof being substantially transmissive to radiation at wavelengths other than a given wavelength and substan...
07/13/1993
5155856Arrangement in a self-guarding data processing system for system initialization and reset
In computer systems deliberate initializations/resets of the processor latches which represent the internal processor states are necessary to erase only such information which is not required for a subsequent operation, e.g., processing/logging error data...
10/13/1992
5051917Method of combining gate array and standard cell circuits on a common semiconductor chip
A method and semiconductor structure are provided for intermixing circuits of two or more different cell classes, such as standard cells and gate array cells, on a common chip or substrate with minimum gound rule separation between adjacent cells of diffe...
09/24/1991
 
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