Did You Know...
...that Thomas Edison's patent application on his phonograph was approved by the Patent Office in just seven weeks? In contrast, it took Gordon Gould, the inventor of the laser, 30 years to obtain his patent -- finally awarded in 1988!
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| Number | Title | Issue Date |
| 8181126 | Differential alternating phase shift mask optimization A method of designing a mask for projecting an image of an integrated circuit design in lithographic processing, wherein the integrated circuit layout has a plurality of segments of critical width. The method comprises creating a first mask design by aligning mask f... | 05/15/2012 |
| 8168507 | Structure and method of forming enhanced array device isolation for implanted plate EDRAM A method for forming a memory device in a semiconductor on insulator substrate is provided, in which a protective oxide that is present on the sidewalls of the trench protects the first semiconductor layer, i.e., SOI layer, of the semiconductor on insulator substrat... | 05/01/2012 |
| 8158515 | Method of making 3D integrated circuits A method and structure of connecting at least two integrated circuits in a 3D arrangement by a through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit. ... | 04/17/2012 |
| 8138093 | Method for forming trenches having different widths and the same depth A lithographic material stack including a photo-resist and an organic planarizing layer is combined with an etch process that generates etch residues over a wide region from sidewalls of etched regions. By selecting the etch chemistry that produces deposition of etc... | 03/20/2012 |
| 8135813 | Method, system and program product for remotely deploying and automatically customizing workstation images A method, system and program product for remotely deploying and automatically customizing workstation images. A client's first partition receives a workstation image deployed from a server in communication with the client via a network. The image includes a customiz... | 03/13/2012 |
| 8131881 | Completion coalescing by TCP receiver A method and system for completion coalescing by a Transmission Control Protocol (TCP) receiver (e.g., in a TCP/IP offload engine (TOE)). The method comprises: processing inbound TCP segments; and performing completion processing of received TCP ACKS and/or RDMA Rea... | 03/06/2012 |
| 8130262 | Apparatus and method for enhancing field of vision of the visually impaired An apparatus and a method for enhancing a field of vision of a user with a visual impairment to help the user to navigate safely in the surroundings. The apparatus includes a body, at least one video device coupled to the body for recording a visual image of a physi... | 03/06/2012 |
| 8125618 | Reflective film interface to restore transverse magnetic wave contrast in lithographic processing A system for exposing a resist layer to an image that includes a layer reflective to imaging tool radiation and a resist layer having a region of photosensitivity over the reflective layer. An imaging tool projects radiation containing an aerial image onto the resis... | 02/28/2012 |
| 8114707 | Method of forming a multi-chip stacked structure including a thin interposer chip having a face-to-back bonding with another chip A temporary substrate having an array of first solder pads is bonded to the front side of a first substrate by reflowing an array of first solder balls. The first substrate is thinned by removing the back side, and an array of second solder pads is formed on the bac... | 02/14/2012 |
| 8108811 | Validation of electrical performance of an electronic package prior to fabrication An electrical resistance determination method. Input to the method includes a description of at least one electrical network within a substrate. The description includes specification of a plurality of first ports on a first side of the substrate, and a plurality of... | 01/31/2012 |
| 8106485 | Chemical oxide removal of plasma damaged SiCOH low k dielectrics A structure and method for removing damages of a dual damascene structure after plasma etching. The method includes the use of sublimation processes to deposit reactive material onto the damaged regions and conditions to achieve a controlled removal of the damaged r... | 01/31/2012 |
| 8103894 | Power conservation in vertically-striped NUCA caches Embodiments that dynamically conserve power in non-uniform cache access (NUCA) caches are contemplated. Various embodiments comprise a computing device, having one or more processors coupled with one or more NUCA cache elements. The NUCA cache elements may comprise ... | 01/24/2012 |
| 8090504 | Feedback loop system for passenger safety Methods, systems and apparatus for automatically ensuring passenger safety by identifying article(s) in need of securing in a vehicle and attaching at least one wireless signaling component to each article. Each wireless signaling component includes a wireless signa... | 01/03/2012 |
| 8084185 | Substrate planarization with imprint materials and processes The present invention relates to planarization materials and methods of using the same for substrate planarization in photolithography. A planarization layer of a planarization composition is formed on a substrate. The planarization composition contains at least one... | 12/27/2011 |
| 8077020 | Method and apparatus for tactile haptic device to guide user in real-time obstacle avoidance An apparatus for providing information about a physical surrounding environment to a user includes an elongate body having first and second opposing ends and a mast, at least one sensor mountably coupled to the mast, at least one dual purpose, bi-directional haptic ... | 12/13/2011 |
| 8056073 | Method, computer program product, and system for merging multiple same class instance states A method, computer program product, and system for enabling the merging of a plurality of instance variables into a new composite same-class instance having the same instance variables with values determined by a user. Same-class instances are arranged in tabular fo... | 11/08/2011 |
| 8055902 | Method, system, and computer program product for data upload in a computing system A method, system, and computer program product for simultaneous multi-channel upload of a file to one or more servers while ensuring data integrity. A validation scheme employs hashes to allow segments of the data file to be separately validated. Thus, if the upload... | 11/08/2011 |
| 8053368 | Method for removing residues from a patterned substrate The present invention relates to a method for removing residues from open areas of a patterned substrate involving the steps of providing a layer of a developable anti-reflective coating (DBARC) over a substrate; providing a layer of a photoresist over said DBARC la... | 11/08/2011 |
| 8053172 | Photoresists and methods for optical proximity correction Photolithography compositions and methods. A first layer of a first photoresist is formed on a substrate. A second layer of a second photoresist is formed directly onto the first layer. The second polymer of the second photoresist includes an absorbing moiety. The s... | 11/08/2011 |
| 8042024 | Method, system, and computer program product for reconstructing a data stream A method, system, and computer program product for reconstructing a data stream are provided. The method includes listening to an original data stream, and extracting messages from the original data stream. The method further includes determining statistical data fr... | 10/18/2011 |
| 8039888 | Conductive spacers for semiconductor devices and methods of forming A method of forming a conductive spacer on a semiconductor device. The method includes depositing a polysilicon layer on the semiconductor device, selectively implanting dopant ions in the polysilicon layer on a first side of a transistor region of the semiconductor... | 10/18/2011 |
| 8035824 | Differential critical dimension and overlay metrology apparatus and measurement method A method is described for measuring a dimension on a substrate, wherein a target pattern is provided with a nominal characteristic dimension that repeats at a primary pitch of period P, and has a pre-determined variation orthogonal to the primary direction. The targ... | 10/11/2011 |
| 8031330 | Mixed polarization state monitoring Mixed polarization state monitoring is presented. One method may include selecting a set of total dose values, and for each total dose value: exposing a location on a photoresist using illumination having an x-polarization value with an x-exposure dose ratio value o... | 10/04/2011 |
| 8023102 | Test method for determining reticle transmission stability Methods, systems and apparatus for monitoring the state of a reticle by providing a reticle having a device exposure region in an imaging tool, defining one or more image fields across the device exposure region, and transmitting energy through the device exposure r... | 09/20/2011 |
| 8013397 | Embedded stressed nitride liners for CMOS performance improvement The present invention provides a semiconducting device including a gate region positioned on a mesa portion of a substrate; and a nitride liner positioned on the gate region and recessed surfaces of the substrate adjacent to the gate region, the nitride liner provid... | 09/06/2011 |
| 8010833 | Software application cluster layout pattern In forming a cluster of processors and applications among a plurality of processors connected in a network the embodiment of a pair of cluster nodes, as applications, in each server/system and arranging for communication between them in a ring or tiered ring configu... | 08/30/2011 |
| 8009268 | Immersion optical lithography system having protective optical coating An immersion lithography system is provided which includes an optical source operable to produce light having a nominal wavelength and an optical imaging system. The optical imaging system has an optical element in an optical path from the optical source to an artic... | 08/30/2011 |
| 8003520 | Air gap structure having protective metal silicide pads on a metal feature A hard mask is formed on an interconnect structure comprising a low-k material layer and a metal feature embedded therein. A block polymer is applied to the hard mask layer, self-assembled, and patterned to form a polymeric matrix of a polymeric block component and ... | 08/23/2011 |
| 7998880 | Low k dielectric CVD film formation process with in-situ imbedded nanolayers to improve mechanical properties A low k dielectric stack having an effective dielectric constant k, of about 3.0 or less, in which the mechanical properties of the stack are improved by introducing at least one nanolayer into the dielectric stack. The improvement in mechanical properties is achiev... | 08/16/2011 |
| 7996854 | Information processing apparatus, method, and program for controlling resource access by application program A method executed in an information processing apparatus for controlling resource access by an application program running on the information processing apparatus is provided. A change in connection statuses or operating statuses of a device connected to the informa... | 08/09/2011 |
| 7985928 | Gap free anchored conductor and dielectric structure and method for fabrication thereof A microelectronic structure and a method for fabricating the microelectronic structure use a dielectric layer that is located and formed upon a first conductor layer. An aperture is located through the dielectric layer. The aperture penetrates vertically into the fi... | 07/26/2011 |
| 7984546 | Tool for filling vias in a greensheet An apparatus tool for filling vias in a product greensheet and/or repairing vias in a product greensheet. The apparatus tool utilizes a transfer greensheet having filled vias in a fixed array, which vias are punched into the product greensheet to either repair or fi... | 07/26/2011 |
| 7971171 | Method and system for electromigration analysis on signal wiring The invention relates to an electromigration analysis method and a system for analyzing one or more nets in a digital integrated circuit design that are at risk of electromigration. The method comprises the steps of providing at least one interconnect between a driv... | 06/28/2011 |
| 7964237 | Fully automated paste dispense process for dispensing small dots and lines A method of dispensing a flowable conductive paste onto a greensheet from a dispensing apparatus comprising an orifice member having first and second surfaces and a bore therethrough between the surfaces, a pressurized chamber adjacent the orifice member first surfa... | 06/21/2011 |
| 7961729 | Broadcast and multicast packet management A method, computer program product, and system for managing broadcast packets or multicast packets received by an Ethernet adapter comprising a plurality of logical ports are provided. The method, computer program product, and system provide for a first function ope... | 06/14/2011 |
| 7955940 | Silicon-on-insulator substrate with built-in substrate junction A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI substrate includes forming an oxide layer on a silicon first substrate... | 06/07/2011 |
| 7944280 | Bandgap reference generator utilizing a current trimming circuit A circuit for providing a bandgap voltage. The circuit includes a classic bandgap reference voltage generation circuit including first end second serially connected transistors acting as a current mirror to another portion of the classical bandgap reference circuit ... | 05/17/2011 |
| 7940785 | Ethernet adapter packet management A method, computer program product, and system for managing packets received by an Ethernet adapter shared by a plurality of threads are provided. The method, computer program product, and system provide for a first function operable to add a connection to a connect... | 05/10/2011 |
| 7930592 | Enabling memory redundancy during testing A design structure embodied in a machine readable medium for designing, manufacturing, testing and/or enabling a redundant memory element (20) during testing of a memory array (14), and a method of repairing a memory array. ... | 04/19/2011 |
| 7926006 | Variable fill and cheese for mitigation of BEOL topography A method of designing features on a semiconductor wafer. A design of active or functional features is provided for chiplets separated by kerf areas on the wafer. The method then includes determining pattern density of the chiplet features, and applying a pattern of ... | 04/12/2011 |
