Celebrity Inventors
Comic actor Danny Kaye received patent D166,807 for the co-design of "Blowout Toy or the Like". It's similar to one of those toys that unravels when you blow into at a birthday party except Kaye's has three blowouts going in different directions, not just one.
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| Number | Title | Issue Date |
| 8085591 | Charge loss compensation during programming of a memory device In programming a selected word line of memory cells, a first program verify or read operation is performed, after one page of a selected word line is programmed, in order to determine a first quantity of memory cells that have been programmed to a predetermined refe... | 12/27/2011 |
| 6716227 | Apparatus and method for corneal surgery Apparatus and method for corneal surgery, apt to increase the accuracy of the surgical interventions, comprising a chassis, apt to be placed onto the eyeball for the centration with respect to the eyeball of the apparatus itself; at least one surgical device, apt to... | 04/06/2004 |
| 7441090 | System and method for updating data sectors in a non-volatile memory using logical block addressing A device is disclosed for storing mapping information for mapping a logical block address identifying a block being accessed by a host to a physical block address, identifying a free area of nonvolatile memory, the block being selectively erasable and having one or ... | 10/21/2008 |
| 7440344 | Level shifter for low voltage operation A voltage level translator boosts the gate voltage of a transistor, and increases the gate to source voltage, to allow operation over a wider range of supply voltages. The P/N ratio of transistors in the voltage level translator is therefore increased, and control o... | 10/21/2008 |
| 7411300 | Agglomeration control using early transition metal alloys Structures and methods of fabricating portions of integrated circuit devices to reduce agglomeration tendencies of high surface-energy metals used in interconnects and contacts. Early transition metals having relatively low surface energies are chosen to form stable... | 08/12/2008 |
| 7408807 | NAND string wordline delay reduction An improved NAND Flash memory and word line selection method has been described, that takes advantage of the asymmetric nature of the word line to word line capacitive coupling to reduce word line selection delay by driving the adjacent word lines to a higher initia... | 08/05/2008 |
| 7389465 | Error detection and correction scheme for a memory device Data is read from a memory array. Before being stored in a data buffer, a Hamming code detection operation and a Reed-Solomon code detection operation are operated in parallel to determine if the data word has any errors. The results of the parallel detection operat... | 06/17/2008 |
| 7388779 | Multiple level programming in a non-volatile device The programming method of the present invention minimizes program disturb by initially programming cells on the same wordline with the logical state having the highest threshold voltage. The remaining cells on the wordline are programmed to their respective logical ... | 06/17/2008 |
| 7142459 | Programming flash memories A flash memory device has an array of flash memory cells, a detector for detecting an external voltage applied to the flash memory device, and a command control circuit for controlling access to the array of flash memory cells. The command control circuit is adapted... | 11/28/2006 |
| 7123541 | Memory with address management The present invention allows for the reduction in power consumption of memory devices. A memory device in one embodiment prohibits address signal propagation on internal address buses based upon a function being performed by the memory. As such, some, all or none of... | 10/17/2006 |
| 7092320 | Medium handler and organizer A compact disc processing system allows for more efficient processing of compact discs. The system included a transporter mechanism that can grip and transport more than one compact disc at a time. As such, a second disc can be gripped while a first disc is being pr... | 08/15/2006 |
| 6916707 | High coupling floating gate transistor The present invention provides methods of fabricating floating gate transistors. One method includes forming laterally spaced source and drain regions to define a channel therebetween, forming a first floating gate portion above the channel region, the first floatin... | 07/12/2005 |
| 6618294 | Non-volatile memory with block erase A method and apparatus for erase operations of a flash memory block. In one embodiment, a method comprises erasing a predetermined percent of rows in a memory block, analyzing a number of erase pulses used to erase the predetermined percent and calculatin... | 09/09/2003 |
