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| Number | Title | Issue Date |
| 6112298 | Method for managing an instruction execution pipeline during debugging of a data processing system A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Micro... | 08/29/2000 |
| 6101457 | Test access port A test access port for an integrated circuit (or circuits) having a test register and a controller is provided. The controller enables the testability functions that have been selected by the test register. The test register performs the select function a... | 08/08/2000 |
| 6081885 | Method and apparatus for halting a processor and providing state visibility on a pipeline phase basis A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Micro... | 06/27/2000 |
| 6065106 | Resuming normal execution by restoring without refetching instructions in multi-word instruction register interrupted by debug instructions loading and processing A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Micro... | 05/16/2000 |
| 6055628 | Microprocessor with a nestable delayed branch instruction without branch related pipeline interlocks A microprocessor 1 has an instruction fetch/decode unit 10a-c, a plurality of execution units, including an arithmetic and load/store unit D1, a multiplier M1, an ALU/shifter unit S1, an arithmetic logic unit ("ALU") L1, a shared multiport register file 2... | 04/25/2000 |
| 6055649 | Processor test port with scan chains and data streaming A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Micro... | 04/25/2000 |
| 6038383 | Method and apparatus for determining signal line interconnect widths to ensure electromigration reliability A method for designing and fabricating an integrated circuit is disclosed. Signal line interconnect widths are determined by performing an electromigration analysis on a trial layout of the integrated circuit. A representative circuit for an integrated ci... | 03/14/2000 |
| 6016555 | Non-intrusive software breakpoints in a processor instruction execution pipeline A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Micro... | 01/18/2000 |
| 5974498 | Loading page register with page value in branch instruction for as fast access to memory extension as in-page access An improved microcomputer has a page register connected to a program counter in order to extend the program address range of the microcomputer. A page stack is connected to the pager register and operates in conjunction with an address stack. The page reg... | 10/26/1999 |
| 5970241 | Maintaining synchronism between a processor pipeline and subsystem pipelines during debugging of a data processing system A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Micro... | 10/19/1999 |
| 5963596 | Audio decoder circuit and method of operation A data processing system (10) is disclosed which comprises a microprocessor host (12) coupled to a decoding system (14). A host interface block (18) receives a bit stream and passes bit stream on to a system decoder block (20). The system decoder block (2... | 10/05/1999 |
| 5952863 | Circuit and method for generating non-overlapping clock signals for an integrated circuit A method is provided for forming non-overlapping clock signals 402 and 404 for an integrated circuit. A reference clock 300 whose frequency is twice that of a desired operating frequency for the integrated circuit is used. A master clock signal is formed ... | 09/14/1999 |
| 5952869 | High power MOS transistor A high power MOS transistor consists of a large number of sub-transistors (T1 to T6) connected in parallel. The gate electrodes of the sub-transistors (T1 to T6) can be driven individually via controllable switching elements (SW1 to SW6; SQ1 to SQ5).... | 09/14/1999 |
| 5946483 | Devices, systems and methods for conditional instructions A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of ... | 08/31/1999 |
| 5946352 | Method and apparatus for downmixing decoded data streams in the frequency domain prior to conversion to the time domain A data processing device is programmed to decode and transform a stream of data representing a plurality of subband encoded channels of audio data into one or more channels of PCM encoded data for reproduction by a speaker subsystem. An improved method fo... | 08/31/1999 |
| 5937179 | Integrated circuit design system with shared hardware accelerator and processes of designing integrated circuits An interactive environment is provided for integrated circuit (IC) designers to do an emulation session on a hardware accelerator 111 and then move to simulator 131, and vice versa. An aspect of the present inventive solution swaps memory state and logic ... | 08/10/1999 |
| 5933360 | Method and apparatus for signal compression and processing using logarithmic differential compression For most `natural` signals like audio and video, the first derivative with respect to time (or spatially as in video) can have a significant amount of error and still be perceived as accurate due to the masking properties of the ears and eyes. A Logarithm... | 08/03/1999 |
| 5931934 | Method and apparatus for providing fast interrupt response using a ghost instruction A data processing device 100 uses a portion of a random access memory 111 as an input buffer for holding a portion of a stream of data which is received by an input interface 130. Likewise, a portion of a memory 121 is used as an output buffer for holding... | 08/03/1999 |
| 5917222 | Intergrated circuit combining high frequency bipolar and high power CMOS transistors A process flow which can be used to fabricate a high frequency bipolar transistor 147, a power transistor 146, and non-power MOS devices on a single substrate while maintaining superior performance. The process flow forms an initial high-voltage tank 170 ... | 06/29/1999 |
| 5913049 | Multi-stream complex instruction set microprocessor A microprocessor (10) and system (2) including a multi-stream pipeline unit (25) are disclosed. The multi-stream pipeline unit (25) includes individual fetch units (26), instruction caches (16i), and decoders (34) in separate instruction stream... | 06/15/1999 |
| 5911104 | Integrated circuit combining high frequency bipolar and high power CMOS transistors A process flow which can be used to fabricate a high frequency bipolar transistor 147, a power transistor 146, and non-power MOS devices on a single substrate while maintaining superior performance. The process flow forms an initial high-voltage tank 170 ... | 06/08/1999 |
| 5903746 | Apparatus and method for automatically sequencing clocks in a data processing system when entering or leaving a low power state A clock acquisition subsystem for a data processing system has an interlocked clock multiplexer 100 for acquiring a clock source which is provided as clock signal 102 to the data processing system. Multiplexer 100 has at least two inputs 104 and 106 for c... | 05/11/1999 |
| 5898862 | Method for configuring an integrated circuit for emulation with optional on-chip emulation circuitry An integrated circuit is provided having a core circuit for performing a plurality of functions, a first pad for receiving an emulator output signal, a pulldown device connected to said first pad, a first logic circuit having an input connected to said fi... | 04/27/1999 |
| 5884023 | Method for testing an integrated circuit with user definable trace function A method for testing a digital processor 11 in which a test port 1149 is used to transfer trace data from the digital processor to a test host processor 1101 under control of a user definable program which executes in response to predetermined events on t... | 03/16/1999 |
| 5860060 | Method for left/right channel self-alignment A data processing device uses a portion of random access memory 121 as an output buffer 124 for holding a portion of a stream of PCM data which is to be output to a digital to analog converter 530. D/A 530 forms a left analog channel and a right analog ch... | 01/12/1999 |
| 5842028 | Method for waking up an integrated circuit from low power mode This is a method and apparatus for waking up an integrated circuit 10 which has been placed into a low power mode in response to an idle instruction or the like. A plurality of wakeup reset signals 320 and wakeup interrupt signals 330 are provided to wake... | 11/24/1998 |
| 5828824 | Method for debugging an integrated circuit using extended operating modes A method of testing an integrated circuit 104 which may have multiple modules 204a-d is provided. Target interface 200 provides an interface for connecting target system 104 to a test system which is an extension of IEEE 1149.1. Target system 104 may have... | 10/27/1998 |
| 5827784 | Method for improving contact openings during the manufacture of an integrated circuit This is a method for improving contact openings during the manufacture of an integrated circuit. The process of forming a contact in an integrated circuit is often carried out rapidly, with imperfect control. As a result, incomplete removal of the insulat... | 10/27/1998 |
