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| Number | Title | Issue Date |
| 5880022 | Self-aligned contact window A self aligned contact to the substrate in the region between two gate electrodes is formed by depositing a conformal dielectric layer and patterning to form a contact window. The conductive elements of the gate electrode are not contacted because of etch... | 03/09/1999 |
| 5879997 | Method for forming self aligned polysilicon contact A gate contact to a field effect transistor is opened over the source/drain region by forming polysilicon plugs between the gate structure, which has a nitride top layer, and the field oxide regions. The contacts are formed by oxidizing and etching the ga... | 03/09/1999 |
| 5608562 | Optical communications system with adjustable dispersion compensation An optical communication system uses adjustable dispersion compensating fibers to compensate for dispersion in system fibers. The amount of dispersion introduced by the dispersion compensating fibers is varied depending upon the amount of compensation req... | 03/04/1997 |
| 5591674 | Integrated circuit with silicon contact to silicide An integrated circuit is described which has an electrical contact formed between a metallic silicide and :Si. The method of integrated circuit manufacturing comprising the steps of: forming a layer of a metallic silicide; depositing a layer of &#x... | 01/07/1997 |
| 5590140 | Clock recovery extrapolation Data recovery is simplified when there is a known interval between packets by using the information about time between packet starts to adjust the receiver clock rather relying solely on the information conveyed by the received bits. Information about pac... | 12/31/1996 |
| 5583078 | Method for fabricating a planar dielectric Re-entrant angles in doped dielectrics produced from the decomposition of organo-silicon compounds are reduced or eliminated by the addition of a polar molecule to the dielectric deposition process.... | 12/10/1996 |
| 5572612 | Bidirectional optical transmission system Bidirectional transmission over a single optical fiber is obtained in an optical communications system by using a three port circulator in customer premises equipment together with an optical fiber amplifier and a narrow band filter. The fiber amplifier c... | 11/05/1996 |
| 5526439 | Optical filter using electro-optic material An optical filter in fabricated in an electro-optic material such as lithium niobate and uses a plurality of pairs of waveguides coupled to each other by optical coupling regions. The waveguides and optical coupling regions overlying electrodes which are ... | 06/11/1996 |
| 5472562 | Method of etching silicon nitride Etch baths having phosphoric acid, nitric acid and hydrofluoric acid and used to selectively remove silicon nitride or silicon with respect to silicon oxide have enhanced initial selectivity when silicon is added to the initial bath. The silicon may be ad... | 12/05/1995 |
| 5461005 | Method of forming silicide in integrated circuit manufacture Electrical discontinuities in a silicide formed on a patterned surface are prevented by forming metal fillets in the recesses of the patterned polysilicon covered surface, and then depositing a metal layer and reacting with silicon to form the silicide. T... | 10/24/1995 |
| 5420058 | Method of making field effect transistor with a sealed diffusion junction A field effect transistor is fabricated with an ion implanted silicide layer and a conducting diffusion barrier pad layer that acts as a diffusion mask. The dopants from the silicide layer are diffused into the substrate to form shallow source/drain regio... | 05/30/1995 |
| 5412245 | Self-aligned vertical antifuse An integrated circuit has a plurality of programmable antifuses. Each antifuse can be programmed to connect metals runners on one level with either or both of a pair of runners on a second level.... | 05/02/1995 |
| 5412263 | Multiple control voltage generation for MOSFET resistors Control voltages are generated so that each transistor in a plurality of parallel connected field effect transistors turns ON with smooth transitions between transistors and in a manner that is relatively insensitive to processing and operating temperatur... | 05/02/1995 |
| 5407859 | Field effect transistor with landing pad A field effect transistor is fabricated with a window pad layer that is patterned using a patterned dielectric with sublithographic spacing as an etch mask. Desirable attributes of the transistor include small junction capacitance.... | 04/18/1995 |
| 5404413 | Optical circulator for dispersion compensation Dispersion compensation is achieved in an optical communications system by using an optical circulator with first, second, and third ports. The first and third ports are connected to system optical fibers. The second port is connected to a dispersion comp... | 04/04/1995 |
| 5396702 | Method for forming solder bumps on a substrate using an electrodeposition technique Solder bumps are electrodeposited onto a substrate with carefully controlled heights by forming patterned conductors on an substrate, depositing and patterning a layer of material, such as titanium that is easily oxidized, and electrodepositing the solder... | 03/14/1995 |
| 5395789 | Integrated circuit with self-aligned isolation Integrated circuits are fabricated on a bonded wafer which has a buried silicide layer.... | 03/07/1995 |
| 5395787 | Method of manufacturing shallow junction field effect transistor Shallow junctions n- and p-channel field effect transistors are formed with a single ion implant into a conformal tungsten silicide layer. Although phosphorous and boron are implanted into the same silicide regions, the phosphorous prevents the boron from... | 03/07/1995 |
| 5392153 | Optical amplifier An amplifier is described which has a two stage arrangement in which the second stage is pumped with the pump signal not used in the first stage.... | 02/21/1995 |
| 5380398 | Method for selectively etching AlGaAs A method for semiconductor device fabrication that uses a mixture of SiCl4, CF4, O2, and He to selectively etch GaAs with respect to AlGaAs. Etch selectivities greater than 300:1 are obtained.... | 01/10/1995 |
| 5367140 | Method for laser welding of optical packages A piezoelectric actuator is used to control the relative positions of a laser and optical fiber during laser welding of components to a base.... | 11/22/1994 |
| 5353309 | ISDN transmitter A transmitter suitable for ISDN use feeds the 2B1Q transmit signals directly into a sigma-delta modulator. The input word is two or three bits and the datapath within the sigma-delta modulator need be only six bits wide. The sigma-delta modulator has samp... | 10/04/1994 |
| 5328872 | Method of integrated circuit manufacturing using deposited oxide Contamination of LPCVDBP TEOS films is reduced by preventing volatile compounds, resulting from reactions of the residue in the outlet of the furnace from reaching the deposition portion of the furnace where they would otherwise react with the deposition ... | 07/12/1994 |
| 5326727 | Method for integrated circuit fabrication including linewidth control during etching Pattern transfer from a resist to an underlying layer is accomplished by etching the underlying layer in a plasma comprising hydrogen bromide and oxygen. Accuracy of pattern transfer is obtained by using first and second materials underneath the resist. T... | 07/05/1994 |
| 5322807 | Method of making thin film transistors including recrystallization and high pressure oxidation A thin film transistor is formed by depositing amorphous silicon and forming a gate structure and then using a high-pressure oxidation to form a high-quality gate oxide that has a layered structure.... | 06/21/1994 |
| 5310457 | Method of integrated circuit fabrication including selective etching of silicon and silicon compounds High etch selectivity of both silicon nitride and silicon with respect to silicon oxide is obtained using an etch bath of phosphoric acid, hydrofluoric acid, and nitric acid. Minimal loading effects are observed and a long bath life is obtained by repleni... | 05/10/1994 |
| 5308742 | Method of etching anti-reflection coating A polyimide layer used in manufacturing semiconductor integrated circuits is etched in a plasma comprising O2, Ar, and CHF3. The plasma produces excellent critical dimension control and yields good resist to polyimide etching selecti... | 05/03/1994 |
| 5290720 | Transistor with inverse silicide T-gate structure A method of making a silicided inverse T-gate with an L-shaped silicon spacer and nitride sidewall spacers is described. The L-shaped spacer is electrically connected to the gate.... | 03/01/1994 |
| 5289467 | Manhattan street network with loop architecture A network is described which has a Manhattan Street architecture that is implemented using a token ring system, such as the fiber distributed data interface, with the primary and secondary rings representing vertical and horizontal lines, respectively.... | 02/22/1994 |
| 5264076 | Integrated circuit process using a "hard mask" A layer of spin-on-glass is used as a hard mask for patterning an underlying layer of polysilicon. The patterned polysilicon may be used in the gate structures of field effect transistors.... | 11/23/1993 |
| 5233184 | Matrix addressed S-SEED optical modulator array Monolithic optically bistable modulator arrays, such as an M×N array of S-SEEDs, are electrically addressed with a matrix of electrical row and column contacts. Connected to the center node of each S-SEED is an addressing means having elements, such as d... | 08/03/1993 |
| 5229231 | Method of integrated circuit manufacturing including cell assembly A method is described which reduces the size of the constraint graph used in assembling cells into a tiled module for integrated circuit manufacture. The smaller size significantly reduces the amount of time required to assemble the cells appropriately.... | 07/20/1993 |
| 5227335 | Tungsten metallization The adhesion of tungsten to an underlying dielectric layer is improved by the use of a thin glue layer of either TiN or Al.... | 07/13/1993 |
| 5198656 | Dynamic optical logic using voltage pull up An optical switch in which states are defined by dynamic charge storage, rather than contention resolution, and which switches using pulsed radiation having a wavelength somewhat longer than the exciton wavelength in a SEED diode. The switch does not exhi... | 03/30/1993 |
| 5110756 | Method of semiconductor integrated circuit manufacturing which includes processing for reducing defect density Defect density in a semiconductor process sequence that uses two local oxidations is reduced by using an approximately 1:1 ratio of nitride to oxide thickness in the second local oxidation step and an annealing step.... | 05/05/1992 |
| 5111255 | Buried channel heterojunction field effect transistor A high transconductance field effect transistor is realized by controlling the doping level in a conducting channel buried beneath a heterointerface. In one exemplary embodiment, a channel comprising an undoped, high mobility, narrow band gap quantum well... | 05/05/1992 |
| 5102827 | Contact metallization of semiconductor integrated-circuit devices In the manufacture of semiconductor integrated-circuit devices, electrical contact to semiconductor regions such as, e.g., source and drain regions of field-effect transistors typically is made by a structure in which a silicide is intermediary to silicon... | 04/07/1992 |
| 5100827 | Buried antifuse An integrated circuit having one or more antifuses which connect electrical components through a dielectric layer. The antifuse is formed before the thick dielectric is deposited and patterned to form windows which expose the antifuse.... | 03/31/1992 |
| 5099149 | Programmable integrated circuit A programmable circuit uses antifuse to program the circuit with the antifuses located not in the logic path but located so they control the voltage applied to the gate electrode of a transistor located in the logic path.... | 03/24/1992 |
| 5080279 | Method for tape automated bonding Solder tape automated bonding of leads to an integrated circuit chip is performed using a constant temperature, flat faced thermode and a clamping plate to keep the leads in contact with the integrated circuit chip.... | 01/14/1992 |
