Did You Know...
...that one person who claimed to be the inventor of the television is Russian emigre Vladimir Zworykin? In 1929 David Sarnoff, founder of RCA, asked Zworykin what it would take to develop TV for commercial use. He said: a year and a half and $100,000. In reality, it took 20 years and $50 million! Before his death in 1982 at the age of 92, Zworykin said of his invention: "The technique is wonderful. It is beyond my expectations. But the programs! I would never let my children even come close to this thing."
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| Number | Title | Issue Date |
| 6697929 | Scannable zero-catcher and one-catcher circuits for reduced clock loading and power dissipation A method and apparatus for scannable zero-catcher and one-catcher circuits. The catcher circuit of the present invention comprises an input stage. A feedback stage is coupled to the input stage. Scanning logic is coupled to the feedback stage. An output s... | 02/24/2004 |
| 6686793 | Gate enhanced tri-channel positive charge pump A gate enhanced tri-channel positive charge pump. The positive charge pump of one embodiment comprises a switching device to transfer charge from its input terminal to its output terminal, the switching terminal further comprising a substrate terminal cou... | 02/03/2004 |
| 6671707 | Method for practical concurrent copying garbage collection offering minimal thread block times A method for practical concurrent copying garbage collection offering minimal thread blocking times. The method comprises achieving dynamic consistency between objects in an old memory space and objects in a new memory space. Threads are allowed to progre... | 12/30/2003 |
| 6655022 | Implementing micro BGA assembly techniques for small die A method of implementing a micro BGA is introduced. More specifically, the method discloses packaging an integrated circuit into an integrated circuit assembly. The method first mounts polyimide tape to a lead frame. The polyimide tape serves as a substra... | 12/02/2003 |
| 6642774 | High precision charge pump regulation A method for high precision charge pump regulation. The method of one embodiment comprises comparing an output feedback voltage with a reference voltage to determine whether the output feedback voltage is greater than or less than the reference voltage. I... | 11/04/2003 |
| 6628108 | Method and apparatus to provide a low voltage reference generation A method and apparatus to provide a low voltage reference generation. The apparatus includes a reference voltage generator to receive a first input voltage signal and output a reference voltage signal. A voltage level detector electrically coupled to the ... | 09/30/2003 |
| 6629047 | Method and apparatus for flash voltage detection and lockout A method for voltage detection and lockout. The method of one embodiment first compares a reference voltage to a supply voltage to determine whether the voltage supply voltage is greater than the reference voltage. The reference voltage is validated by de... | 09/30/2003 |
| 6625695 | Cache line replacement policy enhancement to avoid memory page thrashing A method for a cache line replacement policy enhancement to avoid memory page thrashing. The method of one embodiment comprises comparing a memory request address with cache tags to determine if any cache entry in set `n` can match the address. The addres... | 09/23/2003 |
| 6621342 | Dynamic cascoding technique for operational amplifiers An apparatus for a differential amplifier with dynamic cascodes. The apparatus of one embodiment comprises a dynamic cascode bias generator. A first and second cascode transistors are coupled to the generator. A differential pair is coupled to the cascode... | 09/16/2003 |
| 6622256 | System for protecting strobe glitches by separating a strobe signal into pointer path and timing path, filtering glitches from signals on pointer path thereof A method and apparatus for a strobe glitch protection mechanism for a source synchronous I/O link. One method of the present invention comprises separating a transfer clock having a plurality of transfer clock edges into a pointer path and a timing path. ... | 09/16/2003 |
| 6608528 | Adaptive variable frequency clock system for high performance low power microprocessors A method for dynamically varying a clock frequency in a processor. The method of one embodiment comprises driving a clock distribution network with a clock output from a phased locked loop (PLL). An adjustable clock generator is locked with the phased loc... | 08/19/2003 |
| 6606705 | Method and apparatus for configuring an I/O buffer having an initialized default signaling level to operate at a sampled external circuit signaling level A method for automatically detecting signal levels for buffer configuration. The method of one embodiment first samples a first signal. The first signal is compared with a second signal to determine whether the first signal has a higher voltage potential ... | 08/12/2003 |
| 6604162 | Snoop stall reduction on a microprocessor external bus A method and apparatus for reducing snoop stall on an external bus. One method of the present invention comprises retrieving an address and a transaction attribute for a bus transaction during a first of a plurality of request phase packets of the bus tra... | 08/05/2003 |
| 6598157 | Dynamic boot block control by boot configuration determination and subsequent address modification A method of accessing memory. The method of one embodiment first receives a first address. The first address is then decoded. A determination is made as to whether the first address indicates a top boot address.... | 07/22/2003 |
| 6574141 | Differential redundancy multiplexor for flash memory devices An apparatus for a differential redundancy multiplexor for flash memory devices. One embodiment comprises a memory array comprising a main memory element and a redundant element. A sense amp is coupled to the memory array to evaluate the main memory eleme... | 06/03/2003 |
| 6545448 | Detection of the end-of-life for a rechargeable battery A method for the detection of the end-of-life for a rechargeable battery. The method of one embodiment comprises identifying a rechargeable battery. A designed capacity of the rechargeable batterty is determined. A present full charge capacity of the rech... | 04/08/2003 |
| 6539541 | Method of constructing and unrolling speculatively counted loops A method of constructing and unrolling speculatively counted loops. The method of the present invention first locates a memory load instruction within the loop body of a loop. An advance load instruction is inserted into the preheader of the loop. The mem... | 03/25/2003 |
| 6531745 | Electro static discharge protection n-well ballast resistor device An n-well resistor device and its method of fabrication. The n-well resistor device of the present invention comprises a first n-type region and a second n-type region formed in an n-type silicon region. A gate dielectric layer formed on said n-type silic... | 03/11/2003 |
| 6532526 | Method and apparatus for configuring a memory device and a memory channel using configuration space registers A method and apparatus for configuring memory devices. A disclosed bus controller includes a storage location and a control circuit. The control circuit is coupled to perform an initialization operation when a value indicating that initialization operatio... | 03/11/2003 |
| 6528380 | Electro static discharge protection n-well ballast resistor device An n-well resistor device and its method of fabrication. The n-well resistor device of the present invention comprises a first n-type region and a second n-type region formed in an n-type silicon region. A gate dielectric layer formed on said n-type silic... | 03/04/2003 |
| 6522180 | Bi-voltage levels switches An apparatus to provide a novel bi-voltage level switching. The apparatus includes a first level shifting buffer coupled to a voltage supply, an input, and a first transistor. The first transistor coupled to the voltage supply and an output. A second leve... | 02/18/2003 |
| 6496055 | Gate enhanced tri-channel positive charge pump A gate enhanced tri-channel positive charge pump. The positive charge pump of one embodiment comprises a switching device to transfer charge from its input terminal to its output terminal, the switching terminal further comprising a substrate terminal cou... | 12/17/2002 |
| 6496888 | Incorporation of bus ratio strap options in chipset logic A method for incorporating bus ratio strap options in chipset logic. The method of one embodiment first fabricates a register and multiplexer in chipset logic. The register is programmed with a bus ratio setting. A bus ratio setting is selected to be the ... | 12/17/2002 |
| 6489557 | Implementing micro BGA™ assembly techniques for small die The present invention introduces a method of implementing micro BGA. More specifically, the present invention discloses a method of packaging an integrated circuit into an integrated circuit assembly. The method of the present invention first mounts polyi... | 12/03/2002 |
| 6463004 | VPX bank architecture A method for a VPX banked architecture. The method of one embodiment first segments a memory array into at least two banks. Each bank including memory cells. The banks are provided with a supply voltage.... | 10/08/2002 |
| 6462943 | Method and apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply An apparatus is provided for mounting a Very Large Scale Integration (VLSI) chip such as a microprocessor on the back plane of a computer chassis. In one embodiment, the mounting on the computer chassis is configured to provide a current supply connection... | 10/08/2002 |
| 6459645 | VPX bank architecture A method and apparatus to segment a programmable non-volatile memory array into at least two banks. The banks include memory cells. Each bank in the at least two banks is provided with a local programming voltage. Each local programming voltage is indepen... | 10/01/2002 |
| 6452610 | Method and apparatus for displaying graphics based on frame selection indicators A method for displaying graphics in a computer system. In one embodiment, the method includes a step of receiving a stream of data into the main memory of the computer system. This stream of data comprises a series of descriptions of digital video frames ... | 09/17/2002 |
| 6442069 | Differential signal path for high speed data transmission in flash memory A flash memory using a pre-sensing amplifier coupled to receive differential inputs from a pair of memory cells of said flash memory array and to generate a differential output from the pre-sensing amplifier. The differential output is coupled to a bus, w... | 08/27/2002 |
| 6441678 | Self initialization forcharge pumps A method and apparatus for self initialization for charge pumps. The method of one embodiment comprises generating a pumped voltage at an output of the circuit. The pumped voltage is sent to a first switch. A determination is made as to whether the circui... | 08/27/2002 |
| 6434073 | VPX bank architecture A method for a VPX banked architecture. The method of one embodiment first segments a memory array into at least two banks. Each bank including memory cells. The banks are provided with a supply voltage.... | 08/13/2002 |
| 6412040 | Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture Methods of allocating, writing, reading, de-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage architecture are described. In one embodiment, a method of reliably re-allocating a first object stored wit... | 06/25/2002 |
| 6377121 | Dynamic cascoding technique for operational amplifiers An apparatus for a differential amplifier with dynamic cascodes. The apparatus of one embodiment comprises a dynamic cascode bias generator. A first and second cascode transistors are coupled to the generator. A differential pair is coupled to the cascode... | 04/23/2002 |
| 6378056 | Method and apparatus for configuring a memory device and a memory channel using configuration space registers A method and apparatus for configuring memory devices. A disclosed bus controller includes a storage location and a control circuit. The control circuit is coupled to perform an initialization operation when a value indicating that initialization operatio... | 04/23/2002 |
| 6366158 | Self initialization for charge pumps A method and apparatus for self initialization for charge pumps. The method of one embodiment comprises generating a pumped voltage at an output of the circuit. The pumped voltage is sent to a first switch. A determination is made as to whether the circui... | 04/02/2002 |
| 6356105 | Impedance control system for a center tapped termination bus A method and apparatus for an impedance control system for a center tapped termination bus. One method of the present invention comprises comparing an output potential of a buffer with a pair of reference potentials. The output impedance of the buffer is ... | 03/12/2002 |
| 6353849 | System and server for providing customized web information based on attributes of the requestor A client/server system is disclosed, which includes a requester computer system coupled to a distributed network and having stored thereon demographic information associated with the requester, the demographic information available unencrypted such that t... | 03/05/2002 |
| 6289506 | Method for optimizing Java performance using precompiled code Compilers are tools that generate efficient mappings from programs to machines A Java "Just In Time" runs as part of an application, and as such, it must be fast and efficient in its use of memory. To achieve good performance and further optimize code gen... | 09/11/2001 |
| 6278312 | Method and apparatus for generating a reference voltage signal derived from complementary signals A driver circuit and a receiver circuit. The driver circuit is coupled to drive two complementary signals and the receiver is coupled to receive the two complementary signals. The receiver circuit generates a reference voltage from the two complementary s... | 08/21/2001 |
| 6093216 | Method of run-time tracking of object references in Java programs Many programming languages utilize reference pointers in computer code. Furthermore, some of these programming languages perform memory management in the form of garbage collection. Once such language is Java. During the execution of a garbage collection ... | 07/25/2000 |
