Kinnaman, Jr.; William A. - US Patent Attorneys and Agents

Attorney: Kinnaman, Jr.; William A.

Number of patents: 224
Last date: May 01, 2012

Browse patents
Browse applications

Number	Title	Issue Date
8171442	Method and system to at least partially isolate nets A method to at least partially isolate a net of a circuit design is provided and includes testing a timing characteristic of a circuit design, identifying from a result of the testing a net of the circuit design to be at least partially isolated from an adjacent net...	05/01/2012
8161128	Sharing of data across disjoint clusters Methods and devices are provided for sharing data across two or more different clusters. An operating system (OS) in a cluster checks a metadata record of a file system of a shared device to retrieve path group identifiers (PGIDs). A control unit list of the shared ...	04/17/2012
8149035	Multi-output PLL output shift Controlling a PLL includes providing a voltage controlled oscillator (VCO) and coupling an output of the VCO to a shifter circuit. The shifter circuit has a shifter circuit output, the shifter circuit also including an activation input for receiving an activation si...	04/03/2012
8141019	Method for optimizing of pipeline structure placement A circuit design process is executed to preserve overall design quality while obtaining quality placements for a full class of pipeline structure signatures. The process employs a method for optimizing pipeline structure placement in a circuit design, by initiating ...	03/20/2012
8136092	Multi-attribute dynamic link library packaging A system for packaging a dynamically linked computer program function includes a compiler configured to compile a source file iteratively to create a plurality of corresponding object files, the source file associated with a specific computer program function having...	03/13/2012
8135982	Parallel multiplex storage systems A method for controlling a system includes receiving an indication that an operation has failed in a secondary storage device, suspending data operations sent to the secondary data storage device from a primary storage device, determining a failure policy set by a u...	03/13/2012
8127327	Method for providing multiple streams in digital media and to select viewable content based on geography A method for selectively displaying viewing content based on geographic considerations, the method includes: decoding audio/video (A/V) information; detecting geographic identifiers in the A/V information; displaying specific portions of the A/V information associat...	02/28/2012
8111516	Housing used as heat collector A system for cooling processor assembly is disclosed which comprises a printed circuit board (PCB) with a plurality of heat emitting electronic components and a housing for each PCB with a heat collector. The heat collector is constructed in one-piece material cover...	02/07/2012
8108821	Reduction of logic and delay through latch polarity inversion A method for reducing logic and delay within a logic structure that includes searching logic structures to be analyzed, finding a plurality of latches within a logic structure to be analyzed, determining if any respective latches of the plurality of latches have suf...	01/31/2012
8103989	Method and system for changing circuits in an integrated circuit A method for modifying an integrated circuit and integrated circuits are provided. The method includes: providing an integrated circuit design comprising a plurality of circuit books having a first threshold voltage; and replacing at least one of the plurality of ci...	01/24/2012
8102033	Reduced soft error rate through metal fill and placement A method for reducing single event upsets in an integrated circuit includes the step of providing a plurality of levels within the integrated circuit, wherein the plurality of levels within the integrated circuit are in a stacked arrangement. The method also include...	01/24/2012
8086980	Efficient power region checking of multi-supply voltage microprocessors A improved method for very-early validation of voltage region physical power distribution networks uses initial floor plan and early power grid data to identify physical power connection problems associated with voltage regions defined in multi-supply voltage microp...	12/27/2011
8086843	Performing cryptographic provider failover Cryptographic provider failover is performed. Upon receipt of a first security request, an integrated cryptographic provider constructs a table including a list of underlying cryptographic providers for service type algorithm pairs. The integrated cryptographic prov...	12/27/2011
8056067	Method, computer program product, and device for reducing delays in data processing Data processing delay is reduced during data processing, using compiler optimization. Blocks of code are scanned in an order from blocks recurring most often to blocks recurring least often. In an order from blocks recurring most often to block recurring least often...	11/08/2011
8055753	Peer to peer job monitoring and control in grid computing systems A solution for improved monitoring and control of jobs in grid and batch computing systems provides a centralized server's batch manager which is only responsible for workload balancing and job initiation and completion, all other command and status information are ...	11/08/2011
8032790	Testing of a system logging facility using randomized input and iteratively changed log parameters A method and computer program product for testing a system logger. Randomized input is provided into a logging facility and automated testing of the logging facility is performed in a multi-processing environment. Self-verification of data retrieved from the logging...	10/04/2011
8028259	Automated method and apparatus for very early validation of chip power distribution networks in semiconductor chip designs Validation of full-chip power distribution networks can be performed very early, and continuously throughout the design cycle, to detect real physical power connection problems and enable early correction of power grid designs using early floor plan and power grid d...	09/27/2011
8020162	Employing a resource broker in managing workloads of a peer-to-peer computing environment A resource broker is used in managing workloads of a peer-to-peer distributed computing environment. The broker is responsible for distributing to a plurality of clients of the peer-to-peer distributed computing environment tasks of one or more workloads of one or m...	09/13/2011
8019848	Method and apparatus for connection exploration in a network An improved method for connection exploration in a network is disclosed, wherein said network includes a plurality of network elements each including at least one port, wherein a globally unique identifier is assigned to each individual port of said network elements...	09/13/2011
8015243	Authenticating a requestor without providing a key A method for authenticating a requesting entity in a communications environment. In an exemplary embodiment, the method includes determining a client identification of a client node associated with the requesting entity, and determining whether the requesting entity...	09/06/2011
8010995	Methods, systems, and computer program products for implementing inter-process integrity serialization A method, system, and computer program product for implementing inter-process integrity serialization services is provided. The method includes enabling process states including a must-stay-controlled (MSC) state and an extended must-stay-controlled (EMSC) state for...	08/30/2011
8010922	Automated method for buffering in a VLSI design Buffers are placed on selected nets coupled to input and output pins of entities in an IC device. This includes loading selected input and output pins of entities prior to respectively buffering nets of the entities and buffering in successive iterations, which incl...	08/30/2011
8010771	Communication system for controlling intercommunication among a plurality of communication nodes The invention provides a communication system including a plurality of communication nodes respectively arranged at predetermined lattice points in lattice space forming a three-dimensional rectangular solid, a communication link that interconnects communication nod...	08/30/2011
8006213	Optimization method of integrated circuit design for reduction of global clock load and balancing clock skew A design methodology and algorithms for the computer aided design of integrated circuits having clock distribution networks. The clustering of latch distribution tree components is combined with repositioning of such components within clock sector areas. The movemen...	08/23/2011
8004335	Phase interpolator system and associated methods A phase interpolator system is disclosed that may include a clock to provide a clock signal, and a control section in communication with the clock to regulate the strength of the clock signal. The system may also include a generator circuit to produce an alternate c...	08/23/2011
8001429	Method and system for automated handling of errors in execution of system management flows consisting of system management tasks A method and system for automated error handling in system management flows by enhancing workflow engines by an error handling component and by adding a supportive error handling layer to invoked system management tasks which serves as the counterpart to the workflo...	08/16/2011
8001242	Method for redirection of host data access to multiple non-host file systems or data stores The present invention discloses a system and method for automatic redirection of record-based data access to host files to multiple non-host file systems having non-record-based access comprising a redirector engine, a redirector server and at least one handler. The...	08/16/2011
7996620	High performance pseudo dynamic 36 bit compare A cache memory high performance pseudo dynamic address compare path divides the address into two or more address segments. Each segment is separately compared in a comparator comprised of static logic elements. The output of each of these static comparators is then ...	08/09/2011
7996421	Method, computer program product, and system for coordinating access to locally and remotely exported file systems Application access to locally and remotely exported file systems is coordinated to allow caching data for exported file systems accessed by remote clients. In response to a request or file system access, it is determined whether the request relates to a locally expo...	08/09/2011
7992047	Context sensitive detection of failing I/O devices Methods for context sensitive detection of failing I/O devices sample and record a response time of an I/O device for each of a first plurality of time intervals to generate a first plurality of sampled and recorded response times, and to determine whether or not at...	08/02/2011
7987400	Method for optimizing scan chains in an integrated circuit that has multiple levels of hierarchy A method for optimizing scan chains in an integrated circuit that has multiple levels of hierarchy addresses unlimited chains and stumps and separately all other chains and stumps. Unlimited chains and stumps are optimized by dividing an area encompassed by the chai...	07/26/2011
7984329	System and method for providing DRAM device-level repair via address remappings external to the device A system and method for providing DRAM device-level repair via address remappings external to the device. A system includes a memory controller having an interface to one or more memory devices via a memory module. The memory devices include addressable redundant an...	07/19/2011
7979838	Method of automating creation of a clock control distribution network in an integrated circuit floorplan The process of laying out a floorplan for a clock control distribution network in an integrated chip design is simplified and the efficiency of a staging network created is improved. Rather than manually create the staging network in HDL or as a network description ...	07/12/2011
7979616	System and method for providing a configurable command sequence for a memory interface device A system and method for providing a configurable command sequence for a memory interface device (MID). The system includes a MID intended for use in a cascade interconnect system and in communication with one or more memory devices. The MID includes a first connecti...	07/12/2011
7971162	Verification of spare latch placement in synthesized macros A method to assess spare latch placement in a macro, the method comprises steps of: determining a location for each spare latch in the macro; examining local clock buffers associated with the macro to locate any local clock buffers without a spare latch directly att...	06/28/2011
7962880	Wire structures minimizing coupling effects between wires in a bus A method for minimizing coupling capacitance between wires in a bus comprising shifting by rearranging the order of said wires in said bus so that, aside from said first and last wires in said arrangement, the coupling capacitance across said bus is uniform and mini...	06/14/2011
7953987	Protection of secure electronic modules against attacks A method and apparatus is disclosed for preventing the unintended retention of secret data caused by preferred state/burn-in in secure electronic modules. Sequentially storing the data and its inverse on alternating clock cycles, and by actively overwriting it to de...	05/31/2011
7945918	Generalized WBEM/CIM indication provider simulation engine A simulator of WBEM/CIM indication providers conforming to the CIM Indication Provider object specification simulates both the CIM indication provider and the means to drive the associated CIM events. The simulator comprises three functionally unique pieces: one or ...	05/17/2011
7941689	Minimizing clock uncertainty on clock distribution networks using a multi-level de-skewing technique Disclosed is a method of minimizing clock uncertainty using a multi-level de-skewing technique. The method includes the steps of obtaining a chip wherein at least a portion of the chip has a regular array of buffers on multiple levels, the buffers being driven by fi...	05/10/2011
7930820	Method for structural enhancement of compression system board connections A MCM system board uses a stiffener arrangement to enhance mechanical, thermo and electrical properties by incorporating an LGA compression connector in a computer system. The present designs of large scale computing systems (LSCS) in IBM use a MCM that is attached ...	04/26/2011

«First «Previous1 2 3 4 5 6 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Attorney: Kinnaman, Jr.; William A.