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| Number | Title | Issue Date |
| 6707505 | Method and apparatus for combining video and graphics A single chip system including a first input channel for receiving digital video input data, a second channel for receiving computer graphics data, means for synchronizing the two channels to one another utilizing timing signals which may be selected to provide the ... | 03/16/2004 |
| 6552750 | Apparatus for improving the presentation of graphics data on a television display A circuit for converting a selected portion of graphics data generated for a computer display for presentation on a selected portion of a television display including a first data path for transferring graphics data from a frame buffer memory storing grap... | 04/22/2003 |
| 6429491 | Electrostatic discharge protection for MOSFETs A MOSFET transistor (2 FIG. 4) contains functional elements that together define an electrical capacitance (20, 27, 10-13) capable of accumulating a static electrical charge transferred from an external source, when the transistor is out of or removed fro... | 08/06/2002 |
| 6415379 | Method and apparatus for maintaining context while executing translated instructions A method of maintaining translation context for instructions translated from instructions designed for a target microprocessor to run on a host microprocessor including storing translation context related to each translated host instruction, indicating a ... | 07/02/2002 |
| 6363336 | Fine grain translation discrimination A method for determining if writes to a memory page are directed to target instructions which have been translated to host instructions in a computer which translates instructions from a target instruction set to a host instruction set, including the step... | 03/26/2002 |
| 6356615 | Programmable event counter system Certain events occurring throughout a microprocessor chip are monitored by a counter system (1) containing a number of digital electronic counters (3, 5, 7 & 9) consolidated at a single location on the processor chip. Those events are communicated to the ... | 03/12/2002 |
| 6199152 | Translated memory protection apparatus for an advanced microprocessor A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction ... | 03/06/2001 |
| 6172925 | Memory array bitline timing circuit A circuit for generating timing signals for clocking the sensing amplifiers of a SRAM memory array having a plurality of memory cells joined in rows by wordlines and in columns by bitlines including a dummy bitline, a plurality of dummy memory cells joine... | 01/09/2001 |
| 6031992 | Combining hardware and software to provide an improved microprocessor A microprocessor for a host computer designed to execute target application programs for a target computer having a target instruction set including the combination of code morphing software, and morph host processing hardware designed to execute instruct... | 02/29/2000 |
| 6011908 | Gated store buffer for an advanced microprocessor A gated store buffer including circuitry for temporarily holding apart from other memory stores all memory stores sequentially generated during a translation interval by a host processor translating a sequence of target instructions into host instructions... | 01/04/2000 |
| 5970394 | Method of detecting damaged cellular telephone facilities A method for detecting inequality in path balance in a cellular telephone system including the steps of providing data describing measured signal strength of signals received at a mobile unit and at a cell site in the absence of interference at a pluralit... | 10/19/1999 |
| 5968148 | High quality audio generation by storing wave tables in system memory and having a DMA controller on the sound board for transferring the wave tables An arrangement which utilizes the system memory to store the wave tables used in the generation of high quality sound, and a direct memory access controller to rapidly transfer the portions of the wave tables stored in memory using the system bus so that ... | 10/19/1999 |
| 5958061 | Host microprocessor with apparatus for temporarily holding target processor state Apparatus for use in a processing system having a host processor capable of executing a first instruction set to assist in running instructions of a different instruction set which is translated to the first instruction set by the host processor including... | 09/28/1999 |
| 5926832 | Method and apparatus for aliasing memory data in an advanced microprocessor Apparatus and a method for storing data already stored at an often utilized memory address in registers local to a host processor and maintain the data in the registers and memory consistent so that the processor may respond more rapidly when a memory add... | 07/20/1999 |
| 5926762 | Cellular telephone interference prediction and frequency reuse planning A computer implemented process which includes furnishing data indicating the actual strengths of all signals to be transmitted by a plurality of cells each positioned at an individual physical position in a mobile communications system and to be received ... | 07/20/1999 |
| 5924126 | Method and apparatus for providing address translations for input/output operations in a computer system An input circuit for an input/output device adapted for use in a computer system including a first section having a storage circuit holding physical addresses of input/output devices which are translations of selected input/output bus addresses, and a com... | 07/13/1999 |
| 5918050 | Apparatus accessed at a physical I/O address for address and data translation and for context switching of I/O devices in response to commands from application programs A computer system including a central processing unit, a system input/output bus, an input/output device, and an input/output control unit accessed at a physical input/output address for translating addresses and data in commands from applications program... | 06/29/1999 |
| 5909595 | Method of controlling I/O routing by setting connecting context for utilizing I/O processing elements within a computer system to produce multimedia effects A method of controlling the routing of input/output operations including providing a series of commands expressing connections between sources of data, processing elements, and destinations for data to carry out an input/output operation; compiling a data... | 06/01/1999 |
| 5905855 | Method and apparatus for correcting errors in computer systems A computer implemented process for detecting errors in computer systems including the steps of executing sequences of instructions of a software program on each of a reference system and a test system, detecting and recording state of the reference system... | 05/18/1999 |
| 5887190 | System for determining from a command storing in a storage circuit an application program which has initiated the command to determine an input/output device address An input/output control unit which provides a large amount of input/output address space divisible into areas each of which is a multiple of the system memory management unit page size and thus may be allotted to only one of the individual application pro... | 03/23/1999 |
| 5832205 | Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed A memory controller for a microprocessor including apparatus to both detect a failure of speculation on the nature of the memory being addressed, and apparatus to recover from such failures.... | 11/03/1998 |
| 5805930 | System for FIFO informing the availability of stages to store commands which include data and virtual address sent directly from application programs A digital system which uses an arrangement of one or more parallel FIFO buffers in which each FIFO buffer handles data from only one application program at any time. In order to assure that no data written to a FIFO buffer by an application program will o... | 09/08/1998 |
| 5805175 | Method and apparatus for providing a plurality of color formats from a single frame buffer An arrangement which provides for storing a single lookup/bypass bit with each pixel stored in a frame buffer to indicate whether the color format used to display that pixel on the output display is to use the lookup tables, and for storing an indication ... | 09/08/1998 |
| 5793379 | Method and apparatus for scaling images having a plurality of scan lines of pixel data A method of processing a digital input image having a plurality of scan lines of pixel data into an interpolated digital output image by interpolating the pixel data in each scan line of the digital input image and replicating the pixel data in the slow s... | 08/11/1998 |
| 5768628 | Method for providing high quality audio by storing wave tables in system memory and having a DMA controller on the sound card for transferring the wave tables An arrangement which utilizes the system memory to store the wave tables used in the generation of high quality sound, and a direct memory access controller to rapidly transfer the portions of the wave tables stored in memory using the system bus so that ... | 06/16/1998 |
| 5764861 | Apparatus and method for controlling context of input/output devices in a computer system Hardware input/output control apparatus for use in a computer system which control apparatus is joined to a plurality of input/output devices, and includes circuitry which responds to commands from unprivileged application programs addressed to input/outp... | 06/09/1998 |
| 5758182 | DMA controller translates virtual I/O device address received directly from application program command to physical i/o device address of I/O device on device bus A DMA controller which responds without operating system intervention to virtual addresses provided by application programs, and a memory management unit for providing translations between physical addresses of input/output devices and addresses on a syst... | 05/26/1998 |
| 5754866 | Delayed interrupts with a FIFO in an improved input/output architecture Apparatus for transferring commands over a system transmission path between first and second components in a digital data system including a first-in first-out circuit having a plurality of stages arranged in the system transmission path, circuitry for ge... | 05/19/1998 |
| 5740406 | Method and apparatus for providing fifo buffer input to an input/output device used in a computer system An input circuit for an input/output device adapted for use in a computer system in which a command includes information indicating an application program which initiated the command, the input circuit including a first-in first-out (FIFO) buffer circuit ... | 04/14/1998 |
| 5740464 | Architecture for providing input/output operations in a computer system Hardware input/output address translation apparatus adapted for use in a multitasking computer system including hardware responsive to commands from an unprivileged application program addressed to an input/output address for translating the input/output ... | 04/14/1998 |
| 5733194 | Apparatus for providing improved game port operation in a computer An arrangement which provides hardware at the game port to provide a direct analog-to-digital conversion of input signals provided by the directional input signals of a joystick without involving the central processing unit in the determination. By determ... | 03/31/1998 |
| 5734369 | Method and apparatus for dithering images in a digital display system An ordered dithering process by using different sets of dithering patterns for different color components of the source pixel color instead of using the same set of patterns. The sets of dithered patterns are designed in a way that variations in intensity... | 03/31/1998 |
| 5721947 | Apparatus adapted to be joined between the system I/O bus and I/O devices which translates addresses furnished directly by an application program A computer system including a central processing unit, a system input/output bus, an input/output device, and an input/output control unit joined to the system input/output bus for translating addresses on the system input/output bus to physical input/out... | 02/24/1998 |
| 5696990 | Method and apparatus for providing improved flow control for input/output operations in a computer system having a FIFO circuit and an overflow storage area A system which uses an arrangement of FIFO buffers which include circuitry to assure that no data written to a FIFO buffer by an application program will overflow the FIFO buffer. Each FIFO buffer includes a flow control register which stores a value whic... | 12/09/1997 |
| 5687357 | Register array for utilizing burst mode transfer on local bus Apparatus and a method by which an application program writing a series of commands to a single destination on an input/output bus increments the addresses to which the commands are addressed as the commands are written so that the commands may be transfe... | 11/11/1997 |
| 5685011 | Apparatus for handling failures to provide a safe address translation in an improved input/output architecture for a computer system Hardware input/output address translation apparatus adapted for use in a multitasking computer system including hardware responsive to commands from an unprivileged application program addressed to an input/output address for translating the input/output ... | 11/04/1997 |
| 5680592 | System using a plurality of state machines for translating commands intended for legacy bus devices to commands for local bus devices Apparatus for emulating input/output devices on an ISA bus using input/output devices on a local bus which includes circuitry for snooping on the bus to capture commands sent to input/output devices the functions of which are to be emulated, circuitry for... | 10/21/1997 |
| 5659750 | Apparatus for context switching of input/output devices in responses to commands from unprivileged application programs Hardware input/output control apparatus for use in a computer system which control apparatus is joined to a plurality of input/output devices, and includes circuitry which responds to commands from unprivileged application programs addressed to input/outp... | 08/19/1997 |
| 5652793 | Method and apparatus for authenticating the use of software A hardware encoding circuit which generates a code value unique to a particular computer, stores a password unique to an application program and to the particular computer, tests the stored password against a verification value generated by the hardware e... | 07/29/1997 |
| 5638535 | Method and apparatus for providing flow control with lying for input/output operations in a computer system A flow control circuit for a computer system including a first-in first-out buffer including a register for storing a value indicating the number of stages of the FIFO which are available to store data, circuitry for detecting whether an input/output devi... | 06/10/1997 |
