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| Number | Title | Issue Date |
| 7533412 | Processor secured against traps A method for controlling the execution of a program including of associating with each operator an initial digital code and a final digital code which are linked to each other by a degradation function applied a number of times depending on the execution of this ope... | 05/12/2009 |
| 7533382 | Hyperprocessor A hyperprocessor includes a control processor controlling tasks executed by a plurality of processor cores, each of which may include multiple execution units, or special hardware units. The control processor schedules tasks according to control threads for the task... | 05/12/2009 |
| 7532662 | Method of delaying symbols within a “Rake” receiver, and corresponding “Rake” receiver A receiver includes an input for receiving an input signal including a plurality of symbols from a plurality of multi-path transmission channels, and a plurality of fingers are connected to the input. Each finger includes a plurality of demodulation units assigned t... | 05/12/2009 |
| 7532512 | Non-volatile memory device and method of handling a datum read from a memory cell A memory device includes a pre-charge transistor for connecting/disconnecting the input line of a global data line driver to a supply voltage line. To reduce the flow of current through the pre-charge transistor even in a stand-by state, the pre-charge transistor is... | 05/12/2009 |
| 7532445 | Transient voltage clamping circuit A circuit for transient voltage clamping, the circuit being internal to a motor driver ASIC for a hard drive and including a power transistor for sinking a power supply voltage subjected to transient variation, a reference circuit for deriving a first reference volt... | 05/12/2009 |
| 7531997 | Control device of a switching converter and relative switching converter A control device for a switching converter having an input terminal and an output terminal, a half-bridge of a first and a second transistor coupled between the input terminal and a reference voltage the control device including a first circuit structured to detect ... | 05/12/2009 |
| 7531897 | Process for sealing and connecting parts of electromechanical, fluid and optical microsystems and device obtained thereby A process for connecting two bodies forming parts of an electromechanical, fluid and optical microsystem, wherein a welding region is formed on a first body; an electrically conductive region and a spacing region are formed on a second body; the spacing region exten... | 05/12/2009 |
| 7531447 | Process for forming integrated circuit comprising copper lines An integrated circuit includes copper lines, wherein the crystal structure of the copper has a greater than 30% crystal orientation and a less than 20% crystal orientation. ... | 05/12/2009 |
| 7529299 | Method and system for processing image signals and computer program product therefor A digital video image is compressed by determining for a group of adjacent pixels the global error values that result from the available combinations of truncation and integration of data strings associated with the group of pixels. A combination of truncation and i... | 05/05/2009 |
| 7529145 | Method for reading electrically programmable and erasable memory cells, with bit line precharge-ahead The present invention relates to a method for reading memory cells by means of sense amplifiers, the memory cells being linked to bit lines, the reading of each memory cell comprising a phase of precharging the bit line to which the memory cell is linked and a phase... | 05/05/2009 |
| 7528991 | Method of generating a mask image of membership of single pixels to certain chromaticity classes and of adaptive improvement of a color image In the method, the membership image is produced through a multi-stage process that contemplates a first punctual classification stage generating a rough membership image, followed by a low-pass filtering of regionalization of the image through a down-sampling of the... | 05/05/2009 |
| 7528461 | Bipolar power transistor and related integrated device with clamp means of the collector voltage A bipolar power transistor does not include integration of a Zener diode electrically connected between the base and collector for limiting the collector voltage. The power transistor is formed in a substrate, and includes an equalization diffusion and an auxiliary ... | 05/05/2009 |
| 7526021 | Telecommunications transmission systems In a multi-carrier system employing OFDM, for example DMT, an adaptive channel equalizer is normally used, operating in the frequency domain. The sampling clock is controlled so that the time delay between the transmitter and the receiver is effectively eliminated. ... | 04/28/2009 |
| 7525925 | System and method for selecting an optimal transport format combination using progressive set reduction A system and method is disclosed for selecting an optimal transport format combination using progressive set reduction. A base station in a third generation wireless telecommunication system assigns a transport format combination set to user equipment (UE). The syst... | 04/28/2009 |
| 7525455 | Coder apparatus for resonant power conversion and method An Nth-order shaping coder with multi-level quantization and dithered quantizer. The coder is inherently stable and produces a purely white quantization error spectrum. In one exemplary embodiment, the coder is first order, and an improved dither scheme is employed ... | 04/28/2009 |
| 7525400 | Band pass filtering circuit fitted with acoustic resonators A band pass filtering circuit based on a quadripole includes a serial branch having a first acoustic resonator presenting a frequency of resonance and a frequency of anti-resonance and mounted in serial with a first capacitor; a parallel branch having a second acous... | 04/28/2009 |
| 7525390 | Circuit for converting a differential signal into a non-differential signal, and RF transmitter comprising such a circuit A circuit for converting a differential signal into a nondifferential signal comprising first and second inputs respectively receiving first and second components of a differential signal. The circuit comprises a single bipolar transistor having an emitter, a base a... | 04/28/2009 |
| 7525380 | Method and system for varying gain exponentially with respect to a control signal A method for varying gain exponentially with respect to a control signal is provided. The method includes receiving a primary control signal. A secondary control signal is generated based on the primary control signal. The secondary control signal is provided to a v... | 04/28/2009 |
| 7525370 | Circuits for generating a reference voltage A circuit of generation of a reference voltage by a first MOS transistor connected to a first terminal of application of a supply voltage, the first transistor being in series with a second MOS transistor controlled by an input stage of a transconductance amplifier ... | 04/28/2009 |
| 7525350 | Zero-waiting-current precise over-voltage comparator A precise over-voltage comparator exhibits zero-waiting-current characteristics during normal working conditions. An NMOS transistor is used in conjunction with other circuit elements to regulate the over-voltage comparator. For normal power supply voltages, the com... | 04/28/2009 |
| 7525268 | Control device for an electric motor and related method A control device controls an electric motor that includes a winding and generates a back electromotive force. The device comprises a first circuit suitable for setting time periods each centered on the time instant of an expected zero crossing of the winding current... | 04/28/2009 |
| 7524736 | Process for manufacturing wafers usable in the semiconductor industry To manufacture a layer of semiconductor material, a first wafer of semiconductor material is subjected to implantation to form a defect layer at a distance from a first face; the first wafer is bonded to a second wafer, by putting an insulating layer present on the ... | 04/28/2009 |
| 7523259 | Asynchronous read cache memory and device for controlling access to a data memory comprising such a cache memory A cache memory includes a memory array comprising logic latches, and a circuit for reading the cache memory arranged for receiving a reference tag at input, comparing tags present in the cache memory relative to the reference tag and, if a tag is identical to the re... | 04/21/2009 |
| 7522681 | Method and device for synchronizing a radio transmitter with a radio receiver A method and a device are proposed for the synchronization of a radio transmitter and a radio receiver, notably for UMTS, while utilizing a Golay correlator, which synchronization should be performed reliably without imposing severe requirements as regards the frequ... | 04/21/2009 |
| 7522663 | Burst error limiting feedback equalizer system and method for multidimensional modulation systems A burst error limiting symbol detector system includes a symbol detector circuit responsive to a corrected sample signal for detecting multilevel or multidimensional symbols encoded in the corrected sample signal with reference to a plurality of associated threshold... | 04/21/2009 |
| 7521984 | Driving configuration of a switch A driving circuit of a switch includes first and second transistors connected in series to each other and to relative intrinsic diodes in antiseries and driven by a driving device that includes at least one first and one second output terminal connected to the switc... | 04/21/2009 |
| 7521764 | One-time programmable memory device A one-time programmable, dual-bit memory device comprises one MOS storage transistor having a semiconductor substrate, first and second active regions formed under the surface of the substrate being separated by a part of the substrate forming a channel region, a ga... | 04/21/2009 |
| 7520171 | Micro-electromechanical structure with self-compensation of the thermal drifts caused by thermomechanical stress In a micro-electromechanical structure of semiconductor material, a detection structure is formed by a stator and by a rotor, which are mobile with respect to one another in presence of an external stress and are subject to thermal stress; a compensation structure o... | 04/21/2009 |
| 7519896 | Turbo encoder and related methods A turbo encoder includes multiple interleaved parallel concatenated recursive systematic convolutional encoders wherein each recursive systematic convolutional encoder is provided with an LUT that simultaneously provides the output bit pattern as well as the next st... | 04/14/2009 |
| 7519335 | Digital modulation signal mixer The present invention includes a mixer circuit integrating a voltage-to-currrent conversion in the same stage. A mixer device 20 of a transmission system comprises a pair of transistors 41 and 42 forming a differential circuit having two differe... | 04/14/2009 |
| 7519109 | Process for configuring an xDSL modem and xDSL modem having such a process Process for configuring an xDSL-type symmetric modem, comprising the following: detecting a predetermined criterion corresponding to an asymmetric operating mode, in particular an ADSL-type; and in response to said detection, disabling a number of carriers in order ... | 04/14/2009 |
| 7518324 | Universal motor speed controller Moderately accurate closed loop speed control of a universal motor is attained without the need for any type of speed sensor. Motor armature (across the brushes) voltage is sensed and supplied to a control circuit for processing along with sensed motor current and z... | 04/14/2009 |
| 7516902 | Protection of a microcontroller A method for protecting at least one section of a program executed by a microcontroller, included before execution of the section, decrementing or incrementing at least one first counter and storing its state in a non-volatile memory of the microcontroller; in case ... | 04/14/2009 |
| 7516032 | Resolution in measuring the pulse width of digital signals A system and method for providing improved resolution in the measuring the pulse width of digital signals comprising counting the integral number of measuring clock pulses covered by said digital pulse and triggering a chain of cascaded high resolution delay element... | 04/07/2009 |
| 7515658 | Method to adaptively scale the input to a channel decoder The range R of effective bits (those containing information) within the N bit output(s) from an inner modem is determined and employed to select the M soft bits passed to a channel decoder, thereby avoiding underflow or overflow degrading the channel decoder perform... | 04/07/2009 |
| 7514962 | Configurable I2C interface A synchronous serial data two-wire communications bus that can transfer data at rates up to 100 kbit/s (standard mode), 400 kbits/s (fast mode), or 3.4 Mbit/s (high-speed mode). The load of I2C bus can vary from 10 pf to 400 pf. Data transfer on the I2C bus takes pl... | 04/07/2009 |
| 7514897 | Control of a triac for the starting of a motor A method and a circuit for controlling a triac intended to be series-connected with a resistive element of positive temperature coefficient or which is at least capacitive, and a winding for starting an asynchronous motor, for supply by an A.C. voltage, the present ... | 04/07/2009 |
| 7514714 | Thin film power MOS transistor, apparatus, and method A thin film power transistor includes a plurality of first doped regions over a substrate and a second doped region forming a body. At least a portion of the body is disposed between the plurality of first doped regions. The thin film power transistor also includes ... | 04/07/2009 |
| 7512852 | Protecting an integrated circuit test mode An electronic circuit, including; a logic circuit having a plurality of logic cells; storage cells able to form a shift register, able to be connected to the logic cells; a connecting control module having an input for the reception of an identification key, the mod... | 03/31/2009 |
| 7512157 | Synchronizing a modem and vocoder of a mobile station In one embodiment, the present invention includes a method for determining a level of a buffer that stores data samples. The level may be determined at a predetermined position of a data frame sequence. Based on the level of the buffer at this position, a vocoder an... | 03/31/2009 |
