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| Number | Title | Issue Date |
| 6747520 | Limit swing charge pump and method thereof A charge pump comprising a charge pump core including output switches. The charge pump core, in response to a drive signal, to generate a charge pump output. A limit swing generator, in response to an input signal, to generate the drive signal to control the charge ... | 06/08/2004 |
| 6625006 | Fringing capacitor structure The present invention provides a circuit and method for a fringing capacitor. The fringing capacitor includes at least two conductor layers spaced apart from each other. Each conductor layer includes at least two portions. The portions include odd ones al... | 09/23/2003 |
| 6606358 | Digital servo channel for recording apparatus A servo channel digitally processes the data read from a magnetic media. The channel uses both edges of a system clock to detect peaks and generates position error systems by an area-based automatic gear control loop. By altering the sample delay, the cha... | 08/12/2003 |
| 6606048 | Method and apparatus for equalizing the digital performance of multiple ADC's Method and apparatus for equalizing the digital performance of multiple ADCs includes structure and/or steps for coupling at least one global line between the ADC's resistor ladders to allow current to flow therebetween to balance the reference voltages a... | 08/12/2003 |
| 6601116 | Network switch having descriptor cache and method thereof A device for writing descriptors, the device including a local memory comprising a multiplicity of mini-queues, wherein each of the mini-queues temporarily stores a plurality of descriptors, wherein each of the descriptors is associated with one of the da... | 07/29/2003 |
| 6577114 | Calibration circuit An apparatus is provided to calibrate a target electrical circuit. The target electrical circuit includes at least a first variable capacitor and a first resistive element. The apparatus includes a second variable capacitor proportionally matched to the f... | 06/10/2003 |
| 6566846 | Cascode regulator with plural outputs The present invention provides a circuit and method having a fast response time for generating a regulated voltage from a first voltage source. The circuit includes a driver for generating a drive signal. The driver has a clock input coupled to a clock si... | 05/20/2003 |
| 6563446 | Method and apparatus for direct RAM analog-to-digital converter calibration In the present invention an ADC is calibrated using a matrix of selector elements to connect a plurality of reference voltages to a plurality of comparator circuits. Each selector element contains a switch connected to a memory cell. The switch is control... | 05/13/2003 |
| 6545628 | Analog-to-digital converter with enhanced differential non-linearity A bit-and-one-half analog to digital converter comprising a multiplying analog to digital converter (MDAC) operating in cooperation with a comparator which generates a two-bit digital output signal by comparison of an output of the MDAC against a pair of ... | 04/08/2003 |
| 6526530 | Method and apparatus for encoding data incorporating check bits and maximum transition run constraint Method and apparatus for encoding data using check bits for additional data protection, in addition to the time-varying maximum transition run code which eliminates data patterns producing long runs of consecutive transitions. The check bits are inserted ... | 02/25/2003 |
| 6515506 | Circuit for reducing pin count of a semiconductor chip and method for configuring the chip A circuit that reduces external terminal count of a semiconductor chip, such as a communications chip or other type of chip that requires the generation of configuration codes, by reducing the number of external input terminals required for generating the... | 02/04/2003 |
| 6507449 | Digital servo demodulator with synchronous dithering and method The effective resolution of a Position Error Signal (PES) in a disk drive servo is increased by synchronously dithering the analog PES while sampling it with an Analog-to-Digital Converter (ADC). For each cycle of a burst field signal on a servo sector, a... | 01/14/2003 |
| 6504493 | Method and apparatus for encoding/decoding data A method and apparatus to encode data is provided. The method includes the steps of: i) dividing the data into a plurality of blocks, with each block having a plurality of bits, wherein the plurality of blocks includes a first subset of blocks and a secon... | 01/07/2003 |
| 6489827 | Reduction of offset voltage in current mirror circuit A current mirror includes at least two pairs of metal oxide semiconductor field effect transistors (MOSFETs), preferably manufactured using complementary metal oxide semiconductor (CMOS) technology. Each MOSFET includes a gate, a source, and a drain, and ... | 12/03/2002 |
| 6473010 | Method and apparatus for determining error correction code failure rate for iterative decoding algorithms A design-based tool for determining an error correction code (ECC) failure probability of an iterative decoding algorithm provides a technique for testing the effectiveness of the algorithm before the integrated circuit implementing the algorithm is built... | 10/29/2002 |
| 6462688 | Direct drive programmable high speed power digital-to-analog converter A current source is provided according to the present invention. The current source includes N current sources configured in a parallel arrangement, wherein N is at least two. Each of the N current sources includes a respective control input. The current ... | 10/08/2002 |
| 6459246 | Voltage regulator A linear voltage regulator generates a regulated output voltage from a low overhead input voltage. The voltage regulator includes a series pass device that generates the output voltage based on a control signal. A sense circuit generates a sense signal th... | 10/01/2002 |
| 6456208 | Technique to construct 32/33 and other RLL codes In this invention a thirty three bit word is encoded from a thirty two bit word to conform to RLL coding constraints. A parity bit is added to the coded word after coding is complete. With the parity bit inserted the code satisfies a minimum Hamming weigh... | 09/24/2002 |
| 6441765 | Analog to digital converter with enhanced differential non-linearity A bit-and-one-half analog to digital converter comprising a multiplying analog to digital converter (MDAC) operating in cooperation with a comparator which generates a two-bit digital output signal by comparison of an output of the MDAC against a pair of ... | 08/27/2002 |
| 6429987 | High speed inductor current driver with minimum overshoot A high speed write driver for an inductive head of a magnetic storage medium is provided which contains a mechanism to reduce the inductive head current overshoot and therefore reduce jitter and, thus, increase the write cycle frequency. An input voltage ... | 08/06/2002 |
| 6430238 | Digital servo channel for recording apparatus A servo channel digitally processes the data read from a magnetic media. The channel uses both edges of a system clock to detect peaks and generates position error systems by an area-based automatic gain control loop. By altering the sample delay, the cha... | 08/06/2002 |
| 6427220 | Method and apparatus for prml detection incorporating a cyclic code Apparatus and method for correcting errors in data recovered from a magnetic medium includes detecting the data recovered from the read wave form, and performing an arithmetic operation such as division on the recovered data sequence to determine any non-... | 07/30/2002 |
| 6417725 | High speed reference buffer A circuit to generate a reference voltage from a power supply based on a predetermined voltage level, the reference voltage being used by a switched capacitor analog to digital converter includes a follower connected between the power supply and a current... | 07/09/2002 |
| 6411233 | Method and apparatus for direct RAM analog-to-digital converter calibration In the present invention an ADC is calibrated using a matrix of selector elements to connect a plurality of reference voltages to a plurality of comparator circuits. Each selector element contains a switch connected to a memory cell. The switch is control... | 06/25/2002 |
| 6404290 | Fast change charge pump having switchable boost function A regulator circuit for providing a regulated voltage, comprises a driver for generating a drive signal, and a charge pump having a first voltage input coupled to a first voltage source, being responsive to the drive signal, to generate a pump voltage fro... | 06/11/2002 |
| 6400214 | Switched capacitor filter for reference voltages in analog to digital converter A circuit to generate a reference voltage from a power supply based on a predetermined voltage level includes a follower connected between the power supply and a current source to output the reference voltage. An amplifier, connected in a negative feedbac... | 06/04/2002 |
| 6396334 | Charge pump for reference voltages in analog to digital converter A circuit to generate a reference voltage from a power supply based on a predetermined voltage level, the reference voltage for use by a switched capacitor analog to digital converter includes a follower connected between the power supply and a current so... | 05/28/2002 |
| 6388506 | Regulator with leakage compensation The present invention provides a circuit and method for generating a regulated voltage from a voltage source. The regulator circuit includes at least two boost circuits. A first boost circuit generates a first pump voltage. The first boost circuit include... | 05/14/2002 |
| 6384713 | Serial comparator In this invention compare circuitry is integrated into a serial shift register which can detect a bit pattern of any length with only the delay of three circuits being added to the shift of the last bit in the bit pattern. The circuitry is connected to op... | 05/07/2002 |
| 6380772 | Self-limiting pad driver A complementary self-limiting transmission line driver is capable of driving an unterminated line driver with self-limiting slew rate control to minimize the effects of reflections on the transmission line and minimize the level of noise on power supply d... | 04/30/2002 |
| 6369967 | Phase-adjustment of divided clock in disk head read circuit A read circuit for providing multi-bit disk data to a disk controller in correspondence to analog data from a disk head, includes a low frequency clock generator whose phase is adjustable in response to a detection of the synchronization marker in the ana... | 04/09/2002 |
| 6369554 | Linear regulator which provides stabilized current flow A linear regulator operable from a source voltage provides a regulated voltage to a load. The linear regulator includes a bipolar device connected between the source voltage and the load with an output of the bipolar device connected to output the regulat... | 04/09/2002 |
| 6366168 | Efficient ground noise and common-mode suppression network A CMOS differential amplifier is provided comprising a current supply coupled to a first terminal of a power supply. A first CMOS transistor is provided having a first source, a first gate, and a first drain coupled to the current supply. A second CMOS tr... | 04/02/2002 |
| 6359499 | Temperature and process independent CMOS circuit A analog function is constructed based on CMOS (complimentary metal-oxide semiconductor) technology. It is capable of providing an output voltage, which is proportional to the product of two input voltages. This analog function is insensitive to temperatu... | 03/19/2002 |
| 6331803 | Constant bandwidth, variable gain amplifier, and method A multi-stage amplifier having a plurality of switch mechanisms, one for each stage, that are individually controllable to vary the gain of the amplifier without compromising bandwidth. The amplifier may be embodied in a magnetic storage medium magnetic s... | 12/18/2001 |
| 6246268 | CMOS integrated signal detection circuit with high efficiency and performance In the present invention a semiconductor integrated circuit is described to perform signal detection in a data communication system. The circuit is configured such that the capacitors used in high pass filter and a low pass filter are CMOS capacitors. The... | 06/12/2001 |
| 6120124 | Ink jet head having plural electrodes opposing an electrostatically deformable diaphragm An ink jet recording apparatus capable of ejecting ink droplets in which the volume is precisely and easily controlled. The gradient of the pixel to be printed, based on a digital gradient input signal, is provided for printing high resolution gradient im... | 09/19/2000 |
| 6108462 | Image processing method and device A two-line sensor type image input and processing apparatus and method for accurately determining the current scan state, start of scanning and end of scanning events, as well as estimating scanning speed corresponding thereto, and for performing high pre... | 08/22/2000 |
| 6108437 | Face recognition apparatus, method, system and computer readable medium thereof A face recognition system is provided comprising an input process or circuit, such as a video camera for generating an image of a person. A face detector process or circuit determines if a face is present in a image. A face position registration process o... | 08/22/2000 |
| 6104496 | Printer and control method therefor A printer capable of printing on differing types of recording media. A memory section is provided that is capable of storing insertion wait times that wait for insertion of the respective recording medium types and setting wait times that wait for the rec... | 08/15/2000 |