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| Number | Title | Issue Date |
| 8168933 | Method for forming image sensor with shield structures An image sensor having shield structures and methods of forming the same are provided. Generally, the image sensor includes: (i) substrate having at least one photosensitive element formed therein; (ii) a dielectric layer overlying the substrate and the photosensiti... | 05/01/2012 |
| 8115273 | Deep trench isolation structures in integrated semiconductor devices A integrated semiconductor device has a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type over the first layer, a third semiconductor layer of a second conductivity type over the second layer, an isol... | 02/14/2012 |
| 8110787 | Image sensor with a reflective waveguide An image sensor having shield structures and methods of forming the same are provided. Generally, the image sensor includes: (i) substrate having at least one photosensitive element formed therein; (ii) a dielectric layer overlying the substrate and the photosensiti... | 02/07/2012 |
| 8106436 | Semiconductor trench structure having a sealing plug In one embodiment, a semiconductor device is formed having a trench structure. The trench structure includes a single crystalline semiconductor plug formed along exposed upper surfaces of the trench. In one embodiment, the single crystalline semiconductor plug seals... | 01/31/2012 |
| 8021947 | Method of forming an insulated gate field effect transistor device having a shield electrode structure In one embodiment, a method for forming a transistor having insulated gate electrodes and insulated shield electrodes within trench regions includes forming disposable dielectric stack overlying a substrate. The method also includes forming the trench regions adjace... | 09/20/2011 |
| 7960781 | Semiconductor device having vertical charge-compensated structure and sub-surface connecting layer and method In one embodiment, a semiconductor device is formed having vertical localized charge-compensated trenches, trench control regions, and sub-surface doped layers. The vertical localized charge-compensated trenches include at least a pair of opposite conductivity type ... | 06/14/2011 |
| 7953175 | USB system with spread spectrum EMI reduction A method for applying spread spectrum noise reduction techniques to USB specifically USB2.0 communications systems includes the step of generating a base (seed) frequency for the USB system, modulating the base (seed) frequency with a spread spectrum (SS) characteri... | 05/31/2011 |
| 7948033 | Semiconductor device having trench edge termination structure In one embodiment, a device is formed in a region of semiconductor material. The device includes active cell trenches and termination trenches each having doped sidewall surfaces that compensate the region of semiconductor material during reverse bias conditions to ... | 05/24/2011 |
| 7944044 | Semiconductor package structure having enhanced thermal dissipation characteristics In one embodiment, a packaged semiconductor device having enhanced thermal dissipation characteristics includes a lead frame structure and a semiconductor chip having a major current carrying or heat generating electrode. The semiconductor chip is oriented so that t... | 05/17/2011 |
| 7943466 | Method of forming a semiconductor device having sub-surface trench charge compensation regions In one embodiment, a semiconductor device is formed having sub-surface charge compensation regions in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connec... | 05/17/2011 |
| 7915672 | Semiconductor device having trench shield electrode structure In one embodiment, a structure for a semiconductor device having a trench shield electrode includes a control pad, control runners, shield runners, and a control/shield electrode contact structure. The structure is configured to use a single level of metal to connec... | 03/29/2011 |
| 7902601 | Semiconductor device having deep trench charge compensation regions and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with... | 03/08/2011 |
| 7902075 | Semiconductor trench structure having a sealing plug and method In one embodiment, a semiconductor device is formed having a trench structure. The trench structure includes a single crystalline semiconductor plug formed along exposed upper surfaces of the trench. In one embodiment, the single crystalline semiconductor plug seals... | 03/08/2011 |
| 7901990 | Method of forming a molded array package device having an exposed tab and structure In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connect... | 03/08/2011 |
| 7875950 | Schottky diode structure with multi-portioned guard ring and method of manufacture In one embodiment, a semiconductor structure comprises a multi-portioned guard ring that includes a first portion and a second portion formed in a region of semiconductor material. A conductive contact layer forms a first Schottky barrier with the region of semicond... | 01/25/2011 |
| 7821063 | Semiconductor device having enhanced performance and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a localized region of doping near a portion of a channel region where current exits during operation. ... | 10/26/2010 |
| 7820528 | Method of forming a leaded molded array package In one embodiment, a method for forming a leaded molded array package includes placing a lead frame assembly into a molding apparatus having lead cavities. The method further includes forming seals between conductive leads within the lead frame assembly and the lead... | 10/26/2010 |
| 7799640 | Method of forming a semiconductor device having trench charge compensation regions In one embodiment, a method of forming a semiconductor device with trench charge compensation structures includes exposing the trench sidewalls to a reduced temperature hydrogen desorption process to enhance the formation of monocrystalline semiconductor layers.... | 09/21/2010 |
| 7768078 | Power semiconductor device having improved performance and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a counter-doped drain region spaced apart from a channel region. ... | 08/03/2010 |
| 7755179 | Semiconductor package structure having enhanced thermal dissipation characteristics In an exemplary embodiment, a packaged device having enhanced thermal dissipation characteristics includes a semiconductor chip having a major current carrying or heat generating electrode. The semiconductor chip is oriented so that the major current carrying electr... | 07/13/2010 |
| 7737004 | Multilayer gettering structure for semiconductor device and method In one embodiment, a multi-layer extrinsic gettering structure includes plurality of polycrystalline semiconductor layers each separated by a dielectric layer. ... | 06/15/2010 |
| 7732862 | Power semiconductor device having improved performance and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes an offset body region. ... | 06/08/2010 |
| 7679146 | Semiconductor device having sub-surface trench charge compensation regions In one embodiment, a semiconductor device is formed having sub-surface charge compensation regions in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connec... | 03/16/2010 |
| 7656048 | Encapsulated chip scale package having flip-chip on lead frame structure In one embodiment, an encapsulated electronic package includes a semiconductor chip having patterned solderable pads formed on a major surface. During an assembly process, the patterned solderable pads are directly affixed to conductive leads. The assembly is encaps... | 02/02/2010 |
| 7632760 | Semiconductor device having field stabilization film and method In one embodiment, a high voltage semiconductor device is formed with a first dielectric layer and a charge stabilization layer comprising a flowable glass formed over the first dielectric layer. ... | 12/15/2009 |
| 7602054 | Method of forming a molded array package device having an exposed tab and structure In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connect... | 10/13/2009 |
| 7589392 | Filter having integrated floating capacitor and transient voltage suppression structure and method of manufacture In one embodiment, a filter structure that integrates one plate of a capacitor with an electrode of a transient voltage device. The filter structure includes a well region of one conductivity type formed in semiconductor substrate of an opposite conductivity type. T... | 09/15/2009 |
| 7588999 | Method of forming a leaded molded array package In one embodiment, a method for forming a leaded molded array package includes placing a lead frame assembly into a molding apparatus having lead cavities. The method further includes forming seals between conductive leads within the lead frame assembly and the lead... | 09/15/2009 |
| 7579670 | Integrated filter having ground plane structure In one embodiment, a filter structure includes first and second filter devices formed using a semiconductor substrate. A vertical ground plane structure prevents cross-coupling between the first and second filter devices. ... | 08/25/2009 |
| 7566967 | Semiconductor package structure for vertical mount and method In one embodiment, a semiconductor package structure includes a plurality of upright clips having ends with mounting surfaces for vertically mounting the package to a next level of assembly. A semiconductor chip is interposed between the upright clips together with ... | 07/28/2009 |
| 7538370 | Semiconductor device having reduced gate charge and reduced on resistance and method In one embodiment, a semiconductor device comprises a semiconductor material having a first conductivity type with a body region of a second conductivity type disposed in the semiconductor material. The body region is adjacent a JFET region. A source region of the f... | 05/26/2009 |
| 7518185 | Semiconductor component and method of manufacturing A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component als... | 04/14/2009 |
| 7495323 | Semiconductor package structure having multiple heat dissipation paths and method of manufacture In one embodiment, a semiconductor package structure includes a conductive bridge having coupling portions on opposing ends. A lead frame includes alignment or receiving features for receiving the coupling portions of the bridge. A semiconductor device is attached t... | 02/24/2009 |
| 7482220 | Semiconductor device having deep trench charge compensation regions and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with... | 01/27/2009 |
| 7476959 | Encapsulated electronic device In one embodiment, an electronic device package (1) includes a leadframe (2) with a flag (3). An electronic chip (8) is attached to the flag (3) with a die attach layer (9). A trench (16) having curved sidewalls is fo... | 01/13/2009 |
| 7466212 | Semiconductor filter structure and method of manufacture In one embodiment, a split well region of one conductivity type is formed in semiconductor substrate of an opposite conductivity type. The split well region forms one plate of a floating capacitor and an electrode of a transient voltage suppression device. ... | 12/16/2008 |
| 7446354 | Power semiconductor device having improved performance and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a counter-doped drain region spaced apart from a channel region. ... | 11/04/2008 |
| 7439100 | Encapsulated chip scale package having flip-chip on lead frame structure and method In one embodiment, an encapsulated electronic package includes a semiconductor chip having patterned solderable pads formed on a major surface. During an assembly process, the patterned solderable pads are directly affixed to conductive leads. The assembly is encaps... | 10/21/2008 |
| 7417265 | Schottky diode structure with enhanced breakdown voltage and method of manufacture In one embodiment, a Schottky diode structure comprises a Schottky barrier layer in contact with a semiconductor material through a Schottky contact opening. A conductive ring is formed adjacent the Schottky contact opening and is separated from the semiconductor ma... | 08/26/2008 |
| 7411266 | Semiconductor device having trench charge compensation regions and method In one embodiment, a semiconductor device is formed having charge compensation trenches in proximity to channel regions of the device. The charge compensation trenches comprise at least two opposite conductivity type semiconductor layers. A channel connecting region... | 08/12/2008 |
