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| Number | Title | Issue Date |
| 8161469 | Method and apparatus for comparing programmable logic device configurations Compiled configuration files for different programmable logic devices that are intended to be functionally equivalent may be compared using multiple different comparisons to assure functional equivalence. The different comparisons include a fitter or resource report... | 04/17/2012 |
| 8156355 | Systems and methods for reducing static and total power consumption A method and system for reducing power consumption in a programmable logic device (PLD) is provided. The power consumption may be reduced by preferably continually considering power consumption as a factor in circuit design during the technology mapping, routing, an... | 04/10/2012 |
| 8156171 | Digital logic circuit In one aspect, there is provided a digital logic circuit that comprises circuitry for generating a new iteration xn+1 of the reciprocal square root of A from the previous iteration xn by (i) multiplying the previous iteration xn by t... | 04/10/2012 |
| 8155336 | Wireless headset with integrated media player Additional functionality in a wireless headset allows it to be used during times that the external device with which it is wirelessly coupled is not being used, but when the headset is nevertheless being worn. This is accomplished by integrating a media player into ... | 04/10/2012 |
| 8127215 | Signal loss detector for high-speed serial interface of a programmable logic device A loss-of-signal detector includes digital and analog monitoring of incoming data. The incoming signal is compared digitally to at least one predetermined pattern that may indicate a loss of signal, and also is monitored by an analog detector that detects transition... | 02/28/2012 |
| 8126079 | High-speed serial data signal interface circuitry with multi-data-rate switching capability High-speed serial data signal transmitter and/or receiver circuitry is able to dynamically switch between handling data at two (or more) different data rates. Such a switch can be made very rapidly and with no requirement for reprogramming or reconfiguring the circu... | 02/28/2012 |
| 8112728 | Early timing estimation of timing statistical properties of placement A performance estimation module estimates the performance values of user designs in early phases of compilation and accounts for the performance variability introduced by subsequent compilation phases. The user design is parameterized. The performance estimation mod... | 02/07/2012 |
| 8098724 | Automatic calibration in high-speed serial interface receiver circuitry Circuitry for receiving a serial data signal (e.g., a high-speed serial data signal) includes adjustable equalizer circuitry for producing an equalized version of the serial data signal. The equalizer circuitry may include controllably variable DC gain and controlla... | 01/17/2012 |
| 8098588 | Blind adaptive decision feedback equalizer for high-speed serial communications A blind adaptive decision feedback equalizer technique relies on two thresholds. The first threshold is applied to the incoming sampled analog data. According to this aspect of the invention, if the signal magnitude exceeds the threshold, then it is considered valid... | 01/17/2012 |
| 8072260 | Configurable clock network for programmable logic device In a programmable logic device having high-speed serial interface channels, a clock distribution network for providing one or more high-speed clocks to dynamic phase alignment circuitry of those high-speed serial interfaces includes at least one bus that is segmenta... | 12/06/2011 |
| 8070671 | Methods and devices for luminal and sphincter augmentation Devices and methods for augmenting or otherwise enhancing closure of body lumens comprise magnetic or magnetizable components or particles which are implanted in the wall of the lumen. The magnet fields exerted by the components or particles act to close the body lu... | 12/06/2011 |
| 8070670 | Methods and devices for luminal and sphincter augmentation Devices and methods for augmenting or otherwise enhancing closure of body lumens comprise magnetic or magnetizable components or particles which are implanted in the wall of the lumen. The magnet fields exerted by the components or particles act to close the body lu... | 12/06/2011 |
| 8060729 | Software based data flows addressing hardware block based processing requirements In the provided architecture, one or more multi-threaded processors may be combined with hardware blocks having increased functionality. Each hardware block may be able to transfer a data packet to a particular hardware block based on the packet being processing. On... | 11/15/2011 |
| 8041759 | Specialized processing block for programmable logic device A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundament... | 10/18/2011 |
| 8037435 | Directed design space exploration The time and computational resources needed to evaluate the potential input parameter settings in a design space is decreased by determining probabilities of improvement for input parameter settings in the design space and eliminating input parameter values that hav... | 10/11/2011 |
| 8020027 | Timing control in a specialized processing block The tension between fmax and Tco in a specialized processing block of a programmable integrated circuit device can be reduced by providing variable delays on the clock inputs of the pipeline registers within the specialized processing block. Th... | 09/13/2011 |
| 8014142 | Display window securing system A display window assembly is mounted in the opening of a bezel of a housing, and a force is exerted against the assembly by a suitable resilient element urging it outward through the opening. The assembly may be mounted on a support or frame, from which depends one ... | 09/06/2011 |
| 8004398 | Assistive communication device A patient-caregiver communications system includes a plurality of patient communications modules with which respective patients may communicate with a caregiver, and a caregiver alert device having a plurality of caregiver displays corresponding to the plurality of ... | 08/23/2011 |
| 8001537 | Method and apparatus for compiling programmable logic device configurations During compilation of a user logic design in a first type of programmable logic device (e.g., an FPGA), a log is kept of at least certain steps where choices are made. When that logic design is migrated to another type of programmable logic device (e.g., a mask-prog... | 08/16/2011 |
| 8001509 | Method for programming a mask-programmable logic device and device so programmed A user logic design for a mask-programmable logic device (“MPLD”) may be designed on a comparable or compatible user-programmable logic device (“UPLD”) and migrated to the MPLD, or may be designed directly on an MPLD. If the design is designed on a UPLD, the... | 08/16/2011 |
| 7996749 | Signal loss detector for high-speed serial interface of a programmable logic device A loss-of-signal detector includes digital and analog monitoring of incoming data. The incoming signal is compared digitally to at least one predetermined pattern that may indicate a loss of signal, and also is monitored by an analog detector that detects transition... | 08/09/2011 |
| 7992110 | Methods of verifying functional equivalence between FPGA and structured ASIC logic cells Structured ASIC circuitry that is intended to be functionally equivalent to a programmed block of FPGA circuitry (e.g., a programmed FPGA LUT) is verified for such functional equivalence by using the specification (logical or physical) for the structured ASIC circui... | 08/02/2011 |
| 7991812 | Programmable logic devices with function-specific blocks A programmable logic integrated circuit device has at least one function-specific circuit block (e.g., a parallel multiplier, a parallel barrel shifter, a parallel arithmetic logic unit, etc.) in addition to the usual multiple regions of programmable logic and the u... | 08/02/2011 |
| 7982639 | Deserializer circuitry including circuitry for translating data signals between different formats or protocols In order to help convert serial data, which includes extra protocol encoding bits, to parallel data having the protocol bits removed (or at least separated from the actual data), the serial data is at least partially deserialized using a low-speed clock having diffe... | 07/19/2011 |
| 7966785 | Laminated display window and device incorporating same A laminated window assembly for a device, such as a handheld electronic device (e.g., a media player or mobile telephone), includes a window layer that preferably is glass, and a larger, substantially transparent lip-forming layer to which it is laminated, preferabl... | 06/28/2011 |
| 7957153 | Electrical connection interfaces and methods for adjacently positioned circuit components Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surfa... | 06/07/2011 |
| 7956695 | High-frequency low-gain ring VCO for clock-data recovery in high-speed serial interface of a programmable logic device A voltage-controlled oscillator operates at high frequency without high gain by dividing the frequency range into a plurality of subranges, which preferably are substantially equal in size. Within any subrange, the full extent of variation in the control signal chan... | 06/07/2011 |
| 7949699 | Implementation of decimation filter in integrated circuit device using ram-based data storage A programmable integrated circuit device such as a programmable logic device can be configured as a finite impulse response (FIR) filter capable of operating in decimation mode. The device includes at least one user-configurable random access memory block, and that ... | 05/24/2011 |
| 7948267 | Efficient rounding circuits and methods in configurable integrated circuit devices A specialized processing block for a configurable integrated circuit device includes circuitry for performing multiplications and sums thereof, as well as circuitry for rounding the result. The rounding circuitry reuses an adder that is also available, in other conf... | 05/24/2011 |
| 7941582 | Method and apparatus for mediating among media applications In a device that can execute multiple media applications, but only one at a time, a media server coordinates among applications, but neither the media server nor the individual applications maintain rules regarding all of the different applications. Each connection ... | 05/10/2011 |
| 7930336 | Large multiplier for programmable logic device A plurality of specialized processing blocks in a programmable logic device, including multipliers and circuitry for adding results of those multipliers, can be configured as a larger multiplier by adding to the specialized processing blocks selectable circuitry for... | 04/19/2011 |
| 7930194 | Method and apparatus for deterring frivolous professional liability claims A plan of countersuit insurance provided to professionals, possibly as part of or along with their professional liability insurance, deters frivolous professional malpractice claims. The plan of insurance pays legal costs of countersuits for improper prosecution whe... | 04/19/2011 |
| 7926749 | Apparatus for treating organic waste material The apparatus for treating waste (50, W), in particular organic waste, comprises from the above to below: a loading section (2, 101), a grinding section (3, 102) and a section (4, 107) for storing the waste. A possible succession of steps... | 04/19/2011 |
| 7925913 | CDR control architecture for robust low-latency exit from the power-saving mode of an embedded CDR in a programmable integrated circuit device Clock data recovery (CDR) circuitry of a high-speed serial interface on a programmable integrated circuit device toggles, during the electrical idle period of the receiver of the interface, between its “lock-to-reference” (“LTR”) state and its normal “lock... | 04/12/2011 |
| 7903679 | Power supply filtering for programmable logic device having heterogeneous serial interface architecture In a programmable logic device with a number of different types of serial interfaces, different power supply filtering schemes are applied to different interfaces. For interfaces operating at the lowest data rates—e.g., 1 Gbps—circuit-board level filtering inclu... | 03/08/2011 |
| 7899649 | Signal detect for high-speed serial interface Signal detection circuitry for a serial interface oversamples the input—i.e., samples the input multiple times per clock cycle—so that the likelihood of missing a signal is reduced. Sampling may be done with a regenerative latch which has a large bandwidth and c... | 03/01/2011 |
| 7848402 | Phase-adjusted pre-emphasis and equalization for data communication Methods and circuits are provided for producing phase-adjusted pre-emphasis and equalization. In applications in which little or no phase distortion occurs during signal transmission, propagation, or reception, linear-phase pre-emphasis or equalization can be used t... | 12/07/2010 |
| 7865541 | Configuring floating point operations in a programmable logic device A programmable logic device is programmed to perform arithmetic operations in an internal format that, unlike known standard formats that store numbers in normalized form and require normalization after each computational step, stores numbers in unnormalized form an... | 01/04/2011 |
| 7859329 | Configurable clock network for programmable logic device In a programmable logic device having high-speed serial interface channels, a clock distribution network for providing one or more high-speed clocks to dynamic phase alignment circuitry of those high-speed serial interfaces includes at least one bus that is segmenta... | 12/28/2010 |
| 7857613 | Mold cooling by recovery of energy from spent compressed air in blow-molding process Heat is extracted from compressed gas used in a blow-molding process by expansion cooling the exhausted gas and/or passing the exhausted gas through a vortex tube, which supplies cold gas at an exit thereof. The cold gas is then routed through cooling channels in th... | 12/28/2010 |
