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Attorney: Ilardi Terry J.


Number of patents: 1
Last date: September 27, 1988

NumberTitleIssue Date
4774654Apparatus and method for prefetching subblocks from a low speed memory to a high speed memory of a memory hierarchy depending upon state of replacing bit in the low speed memory
A prefetching mechanism for a memory hierarchy which includes at least two levels of storage, with L1 being a high-speed low-capacity memory, and L2 being a low-speed high-capacity memory, with the units of L2 and L1 being blocks and sub-blocks respective...
09/27/1988
 
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