Penn Jillette of Penn and Teller fame has patented a "Hydro-Therapeutic Stimulator", which uses a hot tub for stimulation.
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| Number | Title | Issue Date |
| 7821867 | Semiconductor memory device A semiconductor memory device includes a plurality of address pads, a plurality of data pads, a mode entry controlling unit configured to control the entry to a data masking mode in response to a write command signal and signals inputted through predetermined pads a... | 10/26/2010 |
| 7821847 | Circuit and method for controlling slew rate of data output circuit in semiconductor memory device A data output circuit of a semiconductor memory device includes at least two data output pads disposed adjacent to each other, a driver unit configured to output a first data by driving a first pad among the data output pads, and a control unit configured to determi... | 10/26/2010 |
| 7821846 | Semiconductor memory device and its driving method A semiconductor memory device including a first latch that latches a Mode Register Set (MRS) code consisting of multiple bits in response to an MRS command pulse, a code controller that generates a control signal in response to a code value of preset bits out of an ... | 10/26/2010 |
| 7821812 | Low-power DRAM and method for driving the same A dynamic random access memory includes: an address latch configured to latch a row address in response to a row address strobe (RAS) signal and latch a column address in response to a column address strobe (CAS) signal; a row decoder configured to decode the row ad... | 10/26/2010 |
| 7818526 | Semiconductor memory device having test mode for data access time A semiconductor memory device for measuring a data access time by controlling data output operation, including: a pipe latch control unit for generating an input control signal based on a test mode signal; a pipe latch unit for receiving data and controlling the dat... | 10/19/2010 |
| 7817491 | Bank control device and semiconductor device including the same A semiconductor memory device includes a plurality of banks a plurality of banks stacked in a column direction, a global data line corresponding to the plurality of banks and a common global data line driving unit for multiplexing data on a plurality of local data l... | 10/19/2010 |
| 7816977 | Core voltage generator Core voltage generator including a comparison unit configured to compare a reference voltage with a feedback core voltage to output a difference between the reference voltage and the feedback core voltage, an amplification unit configured to output a core voltage by... | 10/19/2010 |
| 7816222 | Method for manufacturing semiconductor device having a capacitor A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes cylinder type bottom electrodes connected to a contact plug formed over a semiconductor substrate, and a supporting pattern formed between the cylinder typ... | 10/19/2010 |
| 7813211 | Semiconductor memory device A semiconductor memory device having read and write operations includes a discrimination signal generating unit for generating a discrimination signal during the write operation; and a selective delay unit for receiving and selectively delaying a command-group signa... | 10/12/2010 |
| 7813197 | Write circuit of memory device A write circuit of a semiconductor memory device includes a global data input/output (I/O) line; an amplifying block for receiving and amplifying write data and transmitting the amplified write data as global data onto the global data I/O line; and a control block f... | 10/12/2010 |
| 7812658 | Clock generation circuit A clock generation circuit, which includes a reference clock delay circuit including a number M of delay units connected in series, and configured to delay a reference clock by L cycles; and an oscillation circuit including a number N of delay units connected in ser... | 10/12/2010 |
| 7811929 | Method for forming dual damascene pattern A method for forming a dual damascene pattern includes preparing a multi-functional hard mask composition including a silicon resin as a base resin; forming a deposition structure including a self-arrangement contact insulation film, a first dielectric film, an etch... | 10/12/2010 |
| 7804727 | Semiconductor device having multiple I/O modes Semiconductor device having multiple I/O modes. The device includes a data buffer configured to receive data; a strobe input buffer configured to receive a data strobe signal, a phase controller configured to shift a phase of the data strobe signal by different numb... | 09/28/2010 |
| 7804723 | Semiconductor memory device with signal aligning circuit A signal aligning circuit includes a plurality of pads receiving input signals in parallel 1 bit by 1 bit; a first transferring unit for transferring the input signals as first signals in synchronization with a first clock signal of an internal clock, and transferri... | 09/28/2010 |
| 7804323 | Impedance matching circuit and semiconductor memory device with the same An impedance matching circuit performs a ZQ calibration for a test on a wafer process of a semiconductor memory device. The impedance matching circuit of the semiconductor memory device includes a first pull-down resistance unit, a first pull-up resistance unit, a s... | 09/28/2010 |
| 7800969 | Semiconductor memory device and method for driving the same A semiconductor memory device can stabilize a voltage level of a normal driving voltage terminal in a normal driving operation, which is performed after an overdriving operation, even when an overdriving voltage is unstable due to environmental factors of the semico... | 09/21/2010 |
| 7800963 | Semiconductor memory device operating with prefetch scheme A semiconductor memory device adjusts an activation timing and pulse width of a pin strobe signal according to a power supply voltage variation, and thereby loads data on a pipelatch properly and prevents an activation period of a pin strobe signal from falling out ... | 09/21/2010 |
| 7800962 | Bit line control circuit for semiconductor memory device A semiconductor memory device includes a bit line sense amplifier for sensing and amplifying data applied on a bit line; a first driver for driving a pull-up voltage line of the bit line sense amplifier to a voltage applied on a normal driving voltage terminal; an o... | 09/21/2010 |
| 7800958 | Voltage generating unit of semiconductor memory device A voltage generating unit of a semiconductor memory device makes it possible to reduce a peak current value when generating a high voltage. The voltage generating unit of the semiconductor memory device includes a detecting unit configured to detect a voltage level ... | 09/21/2010 |
| 7800481 | RFID device having a nonvolatile ferroelectric memory A radio frequency identification (RFID) device includes an antenna configured to transmit or receive a radio frequency signal to or from an external communication apparatus; an analog block configured to generate a first power voltage in response to the radio freque... | 09/21/2010 |
| 7800423 | Duty correction circuit A duty correction circuit includes a duty ratio sensor for controlling a duty ratio sensing speed by a sensing speed control signal and outputting a correction signal by sensing a duty ratio of a clock, and a duty ratio corrector for controlling the duty ratio of th... | 09/21/2010 |
| 7791945 | Semiconductor memory device including apparatus for detecting threshold voltage A semiconductor device including a threshold voltage detector and a boosted voltage generating unit. The threshold voltage detector detects a threshold voltage level of cell transistors and outputs a detected threshold voltage level. The boosted voltage generating u... | 09/07/2010 |
| 7791404 | Internal voltage generation circuit and method for semiconductor device An internal voltage generation circuit for a semiconductor device and method therefor includes a voltage generator configured to generate voltages with different levels by using an external voltage. A code storing unit is configured to store a selection code to sele... | 09/07/2010 |
| 7786847 | Radio frequency identification device An RFID device includes an analog block configured to receive a radio frequency signal so as to output an operation command signal, a digital block configured to output an address, a temperature address, an operation control signal, and a temperature sensor activati... | 08/31/2010 |
| 7786791 | Internal voltage generation circuit Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plur... | 08/31/2010 |
| 7786753 | Output driver circuit, semiconductor memory device including the output driver circuit, and method for operating the semiconductor memory device Output driver circuit, semiconductor memory device including the output driver circuit, and method for operating the semiconductor memory device, including a pre-driver to generate a pull-up control signal and a pull-down control signal according to a logic value of... | 08/31/2010 |
| 7786521 | Semiconductor device with dielectric structure and method for fabricating the same A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO2) in ... | 08/31/2010 |
| 7786020 | Method for fabricating nonvolatile memory device A method for fabricating a nonvolatile memory device includes repeatedly stacking a stacked structure over a substrate to form a multi-stacked structure, wherein the stacked structure includes a conductive layer and an insulation layer, forming a photoresist pattern... | 08/31/2010 |
| 7785967 | Method for manufacturing a semiconductor device A semiconductor device includes a semiconductor substrate including an active region and a gate region, and a gate channel formed in a portion of the active region that overlaps the gate region. The gate channel includes a recessed multi-bulb structure. ... | 08/31/2010 |
| 7782698 | Refresh signal generator of semiconductor memory device A refresh signal generator generates an internal refresh signal to conduct a refresh with an interval controlled based on PVT fluctuations. The refresh signal generator includes a temperature sensing unit for sensing an internal temperature and activating a correspo... | 08/24/2010 |
| 7782685 | Semiconductor device and operating method thereof A semiconductor device includes a pad configured to receive a data strobe signal, and a path selector configured to output the data strobe signal through a corresponding input path during a normal operation, and to output the data strobe signal through a plurality o... | 08/24/2010 |
| 7782684 | Semiconductor memory device operating in a test mode and method for driving the same A semiconductor memory device is capable of controlling a tRCD (RAS to CAS Delay) time regardless of an address input timing during a test operation of the semiconductor memory device. The semiconductor memory device includes a column address strobe pulse generator ... | 08/24/2010 |
| 7782647 | Semiconductor memory device A semiconductor memory device has a simple layout pattern of a sub hole region. The semiconductor memory device includes a segment input/output line, a first local input/output line and a second local input/output line corresponding to the segment input/output line,... | 08/24/2010 |
| 7782078 | On die termination circuit and method for calibrating the same On die termination circuit and method for calibrating the same includes a external resistor connected to a first node, a plurality of calibration resistors connected to a second node, the plurality of calibration resistors being turned on/off in response to a calibr... | 08/24/2010 |
| 7781336 | Semiconductor device including ruthenium electrode and method for fabricating the same A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a fi... | 08/24/2010 |
| 7778102 | Semiconductor memory device The present invention provides a semiconductor memory device that can reduce unnecessary current consumption, as banks not accessing data maintain an inactivation state and do not receive an input address. A semiconductor memory device includes a plurality of banks ... | 08/17/2010 |
| 7778095 | Semiconductor memory device and method for driving the same A semiconductor memory device includes a delay locked loop (DLL) unit configured to generate a plurality of DLL clocks, each having a different phase according to delay values predefined by a DLL operation; a data output buffering unit configured to output data in r... | 08/17/2010 |
| 7773709 | Semiconductor memory device and method for operating the same A semiconductor memory device includes an aligning signal generator, a data aligning unit, a data transmitting controller and a data transmitter. The aligning signal generator receives a data strobe signal to output aligning signals. The data aligning unit aligns a ... | 08/10/2010 |
| 7773448 | Semiconductor memory device A semiconductor memory device having multiple banks each including multiple memory blocks arranged in column and row directions. The memory blocks are divided into multiple memory block groups each sharing a corresponding column select signal. The memory blocks belo... | 08/10/2010 |
| 7773440 | ZQ calibration controller and method for ZQ calibration A ZQ calibration circuit performs a ZQ calibration additionally in an initial operation of a semiconductor memory device. The ZQ calibration controller of the ZQ calibration circuit includes a first signal generator, a second signal generator, and a control unit. Th... | 08/10/2010 |