...that "patent leather" got its name because the process of applying the polished black finish to leather was once patented?
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| Number | Title | Issue Date |
| 6465826 | Embedded LSI having a FeRAM section and a logic circuit section An embedded LSI includes a FeRAM macro block and an associated logic circuit section. A hydrogen barrier layer covers the FeRAM macro block as a whole and exposes the logic circuit section. The edge of the hydrogen barrier layer overlies the peripheral ci... | 10/15/2002 |
| 6455932 | Ceramic package for semiconductor device A semiconductor chip is mounted on a bottom plate, on which a side wall surrounding the semiconductor chip is formed. At a position where a lead passes through the side wall, an inner surface of the side wall and that of a ceramic piece lie on the same pl... | 09/24/2002 |
| 6457158 | Method and device for placing electrode for signal observation In a method for placing an electrode for signal observation, after tracking equipotential wires, conducting the collation to give the correspondence in connection relation and adding the wire name to the collated wire, it is checked out whether the top-la... | 09/24/2002 |
| 6457102 | Cache using multiple LRU's Storing data in a cache memory includes providing a first mechanism for allowing exclusive access to a first portion of the cache memory and providing a second mechanism for allowing exclusive access to a second portion of the cache memory, where exclusiv... | 09/24/2002 |
| 6456217 | Digital/analog converter having delta-sigma type pulse modulation circuit In a digital/analog converter for (m+n)-bit, digital input data, a sigma-delta type pulse modulation circuit receives lower-order n bits of the digital input data to generate 1-bit data corresponding to the lower-order n bits in synchronization with a clo... | 09/24/2002 |
| 6456155 | Differential amplifier circuit with offset circuit A differential amplifier circuit includes a first transistor and a second transistor cooperatively forming a current mirror circuit, a third transistor connected in series to the first transistor and connected to an inverted input terminal through which a... | 09/24/2002 |
| 6449835 | Resin structure in which manufacturing cost is cheap and sufficient adhesive strength can be obtained and method of manufacturing it A resin structure includes a resin layer and a metal layer. The resin layer is formed of a single material. The metal layer is laminated directly on the resin layer without intervention of an adhesive layer between the resin layer and the metal layer. A s... | 09/17/2002 |
| 6452241 | Thin film transistor for use in liquid crystal display device and method for manufacturing the same A pair of lightly doped drain (LDD) regions are provided in a thin film transistor of each pixel of a thin film transistor substrate for a liquid crystal display device and a light shielding portion of a material having reflectivity lower than that of a m... | 09/17/2002 |
| 6450850 | Method of manufacturing display panel and display device In a display panel manufacturing method and a display device manufactured by the method, a plate-shaped partition wall-forming member is sandwiched between a mold having an inverted shape to partition walls and a support mold to press-mold the partition w... | 09/17/2002 |
| 6447960 | Electron beam exposure mask and pattern designing method thereof First, a mask pattern is defined to a plurality of lattice shaped regions of a uniform dimension. Then, the lattice shaped regions which are adjacent to each other are assigned to different complementary masks. In this manner, the shape of an opening thro... | 09/10/2002 |
| 6449740 | Conductive paths controllably coupling pad groups arranged along one edge to CPU and to EEPROM in test mode An EEPROM is incorporated in a single chip microcomputer for storing programmed instruction codes, and is tested before separation of a semiconductor wafer into semiconductor chips, wherein pads used in the EEPROM test are arranged along an edge of the se... | 09/10/2002 |
| 6443319 | Shelf system A shelf system has supporting rods (2) and shelf boards (3) provided with fastening devices for fastening them to the supporting rods (2) at various heights. The supporting rods are usually arranged in the comer areas of the rectangular shelf boards. Bore... | 09/03/2002 |
| 6445062 | Semiconductor device having a flip chip cavity with lower stress and method for forming same There is provided a semiconductor device including (a) a substrate, (b) a semiconductor chip mounted on the substrate, (c) a wall having a closed cross-section and mounted on the substrate such that the semiconductor chip is surrounded by the wall, and (d... | 09/03/2002 |
| 6444571 | Process for fabricating a semiconductor device with improved step coverage and reliability of a lower aluminum line A lower aluminum line is exposed to a via-hole formed in an inter-level insulating layer, and an outgassing is carried out before deposition for an upper aluminum line connected through the via-hole to the lower aluminum line, wherein the outgassing is ca... | 09/03/2002 |
| 6441413 | Semiconductor device having thin film resistors made of bolometer materials A semiconductor device comprising bolometers arranged in two-dimensional form corresponding to pixels for converting incoming infrared rays into electrical signals includes vertical switches, a vertical shift register, horizontal switches, and a horizonta... | 08/27/2002 |
| 6442742 | Cache memory having a DRAM memory cell Semiconductor integrated circuit includes a MPU and a cache memory implemented by a plurality of DRAM macro blocks each disposed between the MPU and bonding pads of the chip. Each DRAM macro block has a redundancy function for replacing a defective row wi... | 08/27/2002 |
| 6441425 | Non-volatile semiconductor device and non-volatile semiconductor memory device for storing multi-value information A non-volatile semiconductor device stores multi-value information of at least two bits in one memory cell. A source region and a drain region serve as diffusion regions. A first channel region and a second channel region are placed between the source reg... | 08/27/2002 |
| 6435855 | Resin-molding mold unit and resin-molding apparatus provided with the resin-molding mold unit A resin-molding mold unit and a resin-molding apparatus having the resin-molding mold unit are capable of removing any air trap from a molten resin therein. This makes it possible to produce a molded product which is free from any void and therefore impro... | 08/20/2002 |
| 6437394 | Non-volatile semiconductor memory device with reduced line resistance and method of manufacturing To provide a non-volatile semiconductor memory device in which the word line resistance can be decreased in resistance without being accompanied by increase in chip area, and a manufacturing method for the non-volatile semi conductor memory device. In a n... | 08/20/2002 |
| 6430988 | Ultrasonic leakage inspection device of non-pressure type Leakage inspection of items, such as vessels and pipings, is performed using an ultrasonic wave under no pressure with a device of simple structure. The ultrasonic leakage inspection device according to the present invention comprises an ultrasonic wave e... | 08/13/2002 |
| 6433426 | Semiconductor device having a semiconductor with bump electrodes There is provided a semiconductor device including a semiconductor pellet having a plurality of bump electrodes on a surface thereof, a wiring board having a plurality of pad electrodes on a surface thereof, each one of the pad electrodes being engaged to... | 08/13/2002 |
| 6429910 | Liquid crystal display device and method for repairing breakage of circuit lines thereof In order to use an auxiliary wiring 4 formed on one of opposing substrates as a bypass line of one of circuit lines arranged in matrix on the same substrate, which has a broken portion, cross points (A and B) of the auxiliary wiring 4 and the broken circu... | 08/06/2002 |
| 6429467 | Heterojunction field effect transistor A heterojunction field effect transistor has a buffer layer, a channel layer, a gate insulating layer, a source electrode, a drain electrode, and a gate electrode to be in contact with a substrate. The buffer layer has at least one GaN layer. The channel ... | 08/06/2002 |
| 6429089 | Semiconductor device and method of fabricating the same There is provided a semiconductor device including (a) a semiconductor substrate, (b) a capacity device, (c) an interlayer insulating layer formed between the semiconductor substrate and the capacity device for electrically isolating them with each other,... | 08/06/2002 |
| 6429136 | Method for forming a shallow trench isolation structure in a semiconductor device In a method for forming a device isolation region of an STI structure in a semiconductor device, a surface protecting oxide film is formed on the surface of a trench by a thermal oxidation. Thereafter, a first silicon oxide film is deposited on the whole ... | 08/06/2002 |
| 6426535 | Semiconductor device having improved short channel resistance First, first conductivity type impurities are injected into a semiconductor substrate to selectively form a first conductivity type region. Next, second conductivity type impurities higher in concentration than that of the first conductivity type impuriti... | 07/30/2002 |
| 6426257 | Flash memory and manufacturing method therefor In a flash memory that has a floating gate, a control gate, and an erase gate that are all mutually insulated, in which data erasing is performed by extracting electrons from the corner edge of the floating gate to the erase gate via an insulation film, t... | 07/30/2002 |
| 6423176 | Particle-removing apparatus for a semiconductor device manufacturing apparatus and method of removing particles In a semiconductor device manufacturing apparatus that processing a substrate by applying a voltage to a gas to create a plasma, positively charged particles are trapped or guided at the instant that the cathode voltage is stopped, by an electrode to whic... | 07/23/2002 |
| 6424036 | Semiconductor device and method for manufacturing the same A pad metal film used to fit a conductor for external connection composed of a bump-like or wire-like conductor can be formed by reduced numbers of processes. A semiconductor device is so configured that a trench for interconnect with its diameter of abou... | 07/23/2002 |
| 6423999 | Semiconductor device and capacitor with means to prevent deterioration due to hydrogen There is provided a semiconductor device including (a) a semiconductor substrate, (b) a capacity device, (c) an interlayer insulating layer formed between the semiconductor substrate and the capacity device for electrically isolating them with each other,... | 07/23/2002 |
| 6421036 | Active matrix type liquid crystal display A liquid crystal display panel is provided to an active matrix type liquid crystal display. A TFT side substrate and an opposite side substrate are provided to the liquid crystal display panel. A liquid crystal layer is provided between these substrates. ... | 07/16/2002 |
| 6421277 | Non-volatile semiconductor memory device A threshold voltage distribution D2 apparently decreases to a distribution D3 when there is a distribution D1 of memory cells having deep depletion. After an erase is performed utilizing an erase determination level 1 higher than a desired erase determina... | 07/16/2002 |
| 6415292 | Shuttle-based mechanism for numbering concurrent chains of independent data transfers Transmitting data from a source to a destination, includes receiving the data from the source and providing the data to the destination using a network, where the data is acknowledged to the source as being successfully received at the destination prior t... | 07/02/2002 |
| 6408701 | Apparatus for measuring contamination of the surface of a machine surface A surface contamination measuring apparatus has a suction means for sucking in air from the proximity of an object under measurement, a measurement section for measuring the amount and composition of sucked-in particles, a discharging means for dischargin... | 06/25/2002 |
| 6411268 | Plasma display unit with number of simultaneously energizable pixels reduced to half A plasma display unit applies data pulses of a predetermined polarity to data electrodes in odd-numbered columns and applies data pulses of an opposite polarity to data electrodes in even-numbered columns. The plasma display unit applies scanning pulses w... | 06/25/2002 |
| 6411006 | Electric rotary machine Electromagnetic conversion efficiency of an electric rotary machine is enhanced and reduction of leakage flux due to magnetic discontinuity can be realized without providing holes for positioning and fixing salient poles in a stator ring. Outer appearance... | 06/25/2002 |
| 6410953 | Integrated circuit device with MIM capacitance circuit A first conductive layer of metal silicide, a silicon layer, an insulating layer, and a second conductive layer of metal or metal silicide are deposited in the order named on a surface of a semiconductor substrate. Thereafter, the second conductive layer ... | 06/25/2002 |
| 6410883 | Cleaning device and method for cleaning resin sealing metal mold A cleaning device and a cleaning method for cleaning a resin sealing metal mold effective for removing complex stains on the metal mold in a short time, the stains containing organic and inorganic substances. The cleaning device decomposes stains on the i... | 06/25/2002 |
| 6406989 | Method of fabricating semiconductor device with bump electrodes There is provided a semiconductor device including a semiconductor pellet having a plurality of bump electrodes on a surface thereof, a wiring board having a plurality of pad electrodes on a surface thereof, each one of the pad electrodes being engaged to... | 06/18/2002 |
| 6408425 | Method of designing circuit with field effect transistor and method of determining parameters of model used in such designing method A method of designing a circuit with a field effect transistor (FET) for operation with a large signal. The method comprises the steps of expressing the FET with a two-terminal nonlinear circuit model having a source and a drain, such that a gate terminal... | 06/18/2002 |