Quotables
"The horse is here to stay, the automobile is only a novelty - fad."
President of Michigan Savings Bank ; 1903
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8184477 | Semiconductor switching device A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar t... | 05/22/2012 |
| 8058724 | Holistic thermal management system for a semiconductor chip Various semiconductor chip thermal management systems and methods are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a substrate and coupling a diamond heat spreader that has a thermoelectric cooler to ... | 11/15/2011 |
| 8058108 | Methods of forming semiconductor chip underfill anchors Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend t... | 11/15/2011 |
| 8048724 | Semiconductor switching device A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar t... | 11/01/2011 |
| 8034662 | Thermal interface material with support structure Various semiconductor chip thermal interface material methods and apparatus are disclosed. In one aspect, a method of establishing thermal contact between a first semiconductor chip and a heat spreader is provided. The method includes placing a thermal interface mat... | 10/11/2011 |
| 8017434 | Semiconductor chip package fixture Various methods and apparatus for holding a semiconductor chip package are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first plate adapted to hold a semiconductor chip package. The semiconductor chip package includes a car... | 09/13/2011 |
| 8012874 | Semiconductor chip substrate with multi-capacitor footprint Various methods and apparatus for coupling capacitors to a chip substrate are disclosed. In one aspect, a method of manufacturing is provided that includes forming a mask on a semiconductor chip substrate that has plural conductor pads. The mask has plural openings ... | 09/06/2011 |
| 7999394 | Void reduction in indium thermal interface material Thermal interface materials and method of using the same in packaging are provided. In one aspect, a thermal interface material is provided that includes an indium preform that has a first surface and a second surface opposite to the first surface, an interior porti... | 08/16/2011 |
| 7994044 | Semiconductor chip with contoured solder structure opening Methods and apparatus to inhibit cracks and delaminations in a semiconductor chip solder bump are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first dielectric layer over a first conductor structure of a semiconductor chip ... | 08/09/2011 |
| 7973408 | Semiconductor chip passivation structures and methods of making the same Various semiconductor chip passivation structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a polymeric passivation layer to a side of a semiconductor chip. The side of the semiconductor... | 07/05/2011 |
| 7969020 | Die stacking apparatus and method Various stacked semiconductor devices and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a first semiconductor die that has a first bulk semiconductor side and a first opposite side. A second sem... | 06/28/2011 |
| 7923850 | Semiconductor chip with solder joint protection ring Various semiconductor chip arrangements and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip that has an external peripheral wall to a first side of a substrate. A first metall... | 04/12/2011 |
| 7911791 | Heat sink for a circuit device Various heat sinks, method of use and manufacture thereof are disclosed. In one aspect, a method of providing thermal management for a circuit device is provided. The method includes placing a heat sink in thermal contact with the circuit device wherein the heat sin... | 03/22/2011 |
| 7906424 | Conductor bump method and apparatus Various semiconductor die conductor structures and methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a conductor structure on a conductor pad of a semiconductor die. The conductor layer has a sur... | 03/15/2011 |
| 7897433 | Semiconductor chip with reinforcement layer and method of making the same Various semiconductor chip reinforcement structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip that has a side and forming a polymer layer on the side. The polymer l... | 03/01/2011 |
| 7884633 | Wide area soft defect localization Various apparatus and methods of testing a semiconductor chip for soft defects are disclosed. In one aspect, a method of testing a semiconductor chip that has a surface and plural circuit structures positioned beneath the surface is provided. An external stimulus is... | 02/08/2011 |
| 7847568 | Multi-site probe Various probe substrates for probing a semiconductor die and methods of use thereof are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first matrix array of conductor pins and a second matrix array of conductor pins on a prob... | 12/07/2010 |
| 7873824 | Method and apparatus for remote BIOS configuration control Apparatus and methods for remotely configuring a computer BIOS of a testing computer system are provided. In one aspect, a method of testing is provided that includes establishing an interface between a first computer system and a second computer system. The second ... | 01/18/2011 |
| 7860599 | Lid attachment mechanism Apparatus and methods for assembling semiconductor chips packages are provided. In one aspect, a method of manufacturing is provided that includes placing a first set of semiconductor chip package substrates in a first group of receptacles of a first processing stat... | 12/28/2010 |
| 7799608 | Die stacking apparatus and method Various stacked semiconductor devices and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a first semiconductor die that has a first bulk semiconductor side and a first opposite side. A second sem... | 09/21/2010 |
| 7795589 | Infrared sensor and method of calibrating the same A method includes determining a transmission of a transmissive window and a transmission of a transmissive fluid. In addition, an infrared emission of the transmissive window is determined along with an infrared emission of the transmissive fluid for at least one te... | 09/14/2010 |
| 7795046 | Method and apparatus for monitoring endcap pullback Various apparatus and methods of monitoring endcap pullback are disclosed. In one aspect, an apparatus is provided that includes a substrate that has a plurality of semiconductor regions. Each of the plurality of semiconductor regions has a border with an insulating... | 09/14/2010 |
| 7790501 | Semiconductor chip passivation structures and methods of making the same Various semiconductor chip passivation structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a polymeric passivation layer to a side of a semiconductor chip. The side of the semiconductor... | 09/07/2010 |
| 7745264 | Semiconductor chip with stratified underfill Various semiconductor chip underfills and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a substrate to leave a gap therebetween, and forming an underfill layer in the gap.... | 06/29/2010 |
| 7692467 | Capacitance for decoupling intermediate level power rails Capacitive decoupling circuits and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip with a first power rail for a first no-load bias level and a ground rail. A first voltage d... | 04/06/2010 |
| 7679955 | Semiconductor switching device A switching device and methods of making and operating the same are provided. In one aspect, a method of operating a switching device is provided that includes providing a MOS transistor that has a gate, a source region, a drain region and a body region. A bipolar t... | 03/16/2010 |
| 7678615 | Semiconductor device with gel-type thermal interface material Various methods and apparatus for establishing a thermal pathway for a semiconductor device are disclosed. In one aspect, a method of manufacturing is provided that includes forming a metal layer on a semiconductor chip and forming a gel-type thermal interface mater... | 03/16/2010 |
| 7670939 | Semiconductor chip bump connection apparatus and method Various semiconductor chip packages and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a solder bump to a side of a semiconductor chip and bringing the solder bump into contact with a conductor p... | 03/02/2010 |
| 7651938 | Void reduction in indium thermal interface material Thermal interface materials and method of using the same in packaging are provided. In one aspect, a thermal interface material is provided that includes an indium preform that has a first surface and a second surface opposite to the first surface, an interior porti... | 01/26/2010 |
| 7633151 | Integrated circuit package lid with a wetting film Various integrated circuit packages, lids therefor and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing an integrated circuit package lid that has a surface adapted to face towards an integrated ci... | 12/15/2009 |
| 7544542 | Reduction of damage to thermal interface material due to asymmetrical load Various method and apparatus for packaging an integrated circuit are provided. In one aspect, a method of packaging an integrated circuit is provided that includes coupling an integrated circuit to a substrate, mixing an adhesive with a plurality of particles, and c... | 06/09/2009 |
| 7513686 | Circuit lid with a thermocouple Various devices for measuring an electronic device lid are provided. In one aspect, an apparatus is provided that includes an integrated circuit, a lid for positioning on the integrated circuit, and a junction of two dissimilar metals associated with the lid. The ju... | 04/07/2009 |
| 7513035 | Method of integrated circuit packaging Various integrated circuit package elements are provided. In one aspect, an integrated circuit package device is provided that includes a lid for covering an integrated circuit. The lid has a convex surface for applying pressure on the integrated circuit when the li... | 04/07/2009 |
| 7482697 | Double-sided waffle pack Double-sided waffle packs and methods of using the same are provided. In one aspect, a waffle pack is provided that includes a body that has a first side and second side opposite the first side. The first side has a first cavity for enabling a semiconductor die to b... | 01/27/2009 |
| 7313777 | Layout verification based on probability of printing fault Methods and apparatus for checking layouts of circuit features are provided. In one aspect, a method of designing a layout for a circuit feature is provided that includes deriving a function which relates a size and a plurality of aerial image parameters of the circ... | 12/25/2007 |
| 7271047 | Test structure and method for measuring the resistance of line-end vias A test structure and methods of using and making the same are provided. In one aspect, a test structure is provided that includes a first conductor that has a first end and a second conductor that has a second end positioned above the first end. A third conductor is... | 09/18/2007 |
| 7256067 | LGA fixture for indium assembly process An integrated circuit lid fixture and methods of using the same are provided. In one aspect, an integrated circuit lid fixture is provided that includes a base that has a plurality of pillars. Each of the plurality of pillars has a surface for supporting a substrate... | 08/14/2007 |
| 7176095 | Bi-modal halo implantation Methods of fabricating halo regions are provided. In one aspect, a method is provided of fabricating a first halo region and a second halo region for a circuit device of a first conductivity type and having a gate structure with first and second sidewalls. The first... | 02/13/2007 |
| 7144782 | Simplified masking for asymmetric halo Various methods of fabricating halo regions are disclosed. In one aspect, a method of manufacturing is provided that includes forming a symmetric transistor gate and an asymmetric transistor gate on a substrate. The symmetric and asymmetric transistor gates are subs... | 12/05/2006 |
| 7022976 | Dynamically adjustable probe tips Various probe systems and probes are provided. In one aspect, a probe is provided that includes a base and a first member coupled to the base. The first member has a first tip for probing a circuit device. A first actuator is coupled to the first member for moving t... | 04/04/2006 |
