Reward Candy Dispenser for Personal Computers
A personal computer peripheral, battery powered reward candy dispenser which immediately presents students with a single candy for each problem completed correctly.
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| Number | Title | Issue Date |
| 8183683 | Semiconductor device and fabricating method thereof A semiconductor device is provided. The semiconductor device comprises a semiconductor die having bond pads, each of which consists of a first bond pad made of a material whose ionization tendency is relatively low and a second bond pad made of a material whose ioni... | 05/22/2012 |
| 8176628 | Protruding post substrate package structure and method In accordance with one embodiment, a method of forming a protruding post substrate package includes applying a dielectric layer to a carrier. Via apertures are formed in the dielectric layer. Carrier cavities are formed in the carrier using the dielectric layer as a... | 05/15/2012 |
| 8143727 | Adhesive on wire stacked semiconductor package A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is... | 03/27/2012 |
| 8129849 | Method of making semiconductor package with adhering portion Disclosed are a semiconductor package and a method of making the same. In the semiconductor package, a substrate and a semiconductor die are covered with and encapsulated by vertically pressing thermosetting resin having fluidity in a predetermined temperature range... | 03/06/2012 |
| 8119455 | Wafer level package fabrication method A method of forming an electronic component package includes coupling a first surface of an electronic component to a first surface of a first dielectric strip, the electronic component comprising bond pads on the first surface; forming first via apertures through t... | 02/21/2012 |
| 8110909 | Semiconductor package including top-surface terminals for mounting another semiconductor package A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die ... | 02/07/2012 |
| 8104083 | Virtual machine file system content protection system and method A method includes creating a first virtual machine comprising a remote file system. The method further includes causing all input/output from a second virtual machine to be redirected to the remote file system, the first virtual machine and the second virtual machin... | 01/24/2012 |
| 8072083 | Stacked electronic component package having film-on-wire spacer A film-on-wire spacer covers an entire upper surface of a lower electronic component. Accordingly, an upper electronic component is supported above bond pads and lower bond wires of the lower electronic component. This decreases the stress on the upper electronic co... | 12/06/2011 |
| 8065734 | Code module operating system (OS) interactions intercepting system and method A method includes creating an intercept function for a tracked Dynamic Link Library (DLL) function of a Dynamic Link Library (DLL) being loaded into a suspicious module. Further, the import address table entry for the tracked DLL function is replaced with the respec... | 11/22/2011 |
| 8058726 | Semiconductor device having redistribution layer A semiconductor device and method of manufacturing the same are provided. The semiconductor device comprises a semiconductor die including a bond pad, a redistribution layer, and a solder ball. The redistribution layer is formed by sequentially plating copper and ni... | 11/15/2011 |
| 8037529 | Buffer overflow vulnerability detection and patch generation system and method A computer-implemented method includes identifying a buffer overflow vulnerability in a vulnerable program including identifying a victim buffer creation site that created a victim buffer and identifying a vulnerability site that overflowed the victim buffer. A patc... | 10/11/2011 |
| 8026587 | Semiconductor package including top-surface terminals for mounting another semiconductor package A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die ... | 09/27/2011 |
| 8022521 | Package failure prognostic structure and method In accordance with one embodiment, a failure prognostic package includes a substrate having a first surface and an opposite second surface. An electronic component trace is coupled to the first surface. An electronic component is electrically coupled to the electron... | 09/20/2011 |
| 8018068 | Semiconductor package including a top-surface metal layer for implementing circuit features A semiconductor package including a top-surface metal layer for implementing circuit features provides improvements in top-surface interconnect density, more flexible routing and mounting of top surface semiconductor packages, dies and passive components or a confor... | 09/13/2011 |
| 8017436 | Thin substrate fabrication method and structure A method of forming a package includes forming a circuit pattern on a first carrier and embedding the circuit pattern in a dielectric material on a second carrier. The first carrier is removed and a buildup dielectric material is mounted to the dielectric material a... | 09/13/2011 |
| 8004078 | Adhesive composition for semiconductor device Provided is an adhesive composition for a semiconductor device. For example, the adhesive composition comprises a binder resin and a silicon carbide filler. The silicon carbide filler has relatively high thermal conductivity and a relatively low coefficient of therm... | 08/23/2011 |
| 7999371 | Heat spreader package and method A heat spreader package includes a substrate having a first surface, first traces on the first surface of the substrate, and an electronic component having an inactive surface mounted to the first surface of the substrate. The electronic component further includes a... | 08/16/2011 |
| 7994045 | Bumped chip package fabrication method and structure A method of fabricating a bumped chip package includes forming a first seed layer on a dielectric layer, the dielectric layer comprising a dielectric layer opening exposing a substrate terminal of a substrate, the first seed layer being formed within the dielectric ... | 08/09/2011 |
| 7994043 | Lead free alloy bump structure and fabrication method A method includes forming a patterned resist layer comprising a resist layer opening overlying a bond pad of a substrate. The resist layer opening is at least partially filled with a first solder component layer. A second solder component layer is formed on the firs... | 08/09/2011 |
| 7982306 | Stackable semiconductor package A stackable semiconductor package includes a substrate with a first side surface that includes circuit patterns. Each circuit pattern includes a pad. A semiconductor die is electrically coupled to the circuit patterns. An encapsulant covers the semiconductor die and... | 07/19/2011 |
| 7977783 | Wafer level chip size package having redistribution layers A wafer level chip size package (WLCSP) and a method of manufacturing the same are disclosed. Lands are formed at the ends of redistribution layers. The redistribution layers excluding the lands and a first dielectric layer are covered with a second dielectric layer... | 07/12/2011 |
| 7977163 | Embedded electronic component package fabrication method A method of forming an embedded electronic component package includes coupling a substrate to a first dielectric layer, strip, or panel, and forming first electrically conductive vias and traces in the first dielectric layer. A cavity is then formed in the first die... | 07/12/2011 |
| 7960827 | Thermal via heat spreader package and method A thermal via heat spreader package includes an electronic component having an active surface including a nonfunctional region. A package body encloses the electronic component, the package body comprising a principal surface. Thermal vias extend from the principal ... | 06/14/2011 |
| 7958626 | Embedded passive component network substrate fabrication method A method of forming an embedded passive component network substrate includes providing a first carrier with a first dielectric layer and patterning the first dielectric layer to form a first patterned dielectric layer including circuit pattern artifacts. A first etc... | 06/14/2011 |
| 7951697 | Embedded die metal etch stop fabrication method and structure A method of forming an electronic component package includes forming a patterned dielectric layer comprising circuit pattern artifacts and at least one electronic component opening. An etch stop metal protected circuit pattern is plated with the circuit pattern arti... | 05/31/2011 |
| 7932595 | Electronic component package comprising fan-out traces A method of forming an electronic component package includes coupling a first surface of an electronic component to a first surface of a first dielectric strip, the electronic component comprising bond pads on the first surface; forming first via apertures through t... | 04/26/2011 |
| 7932170 | Flip chip bump structure and fabrication method A method includes forming a patterned buildup layer on a first surface of a dielectric layer, the patterned buildup layer including a patterned buildup layer opening exposing a trace coupled to the dielectric layer. A conductor layer is flash plated on the patterned... | 04/26/2011 |
| 7923645 | Metal etch stop fabrication method and structure A first patterned etch stop layer and a first patterned conductor layer are laminated by a dielectric material to a second patterned etch stop layer and a second patterned conductor layer. As the etch stop metal of the first and second patterned etch stop layers is ... | 04/12/2011 |
| 7911037 | Method and structure for creating embedded metal features A method and structure for creating embedded metal features includes embedded trace substrates wherein bias and signal traces are embedded in a first surface of the embedded trace substrate and extend into the body of the embedded trace substrate. The bias trace and... | 03/22/2011 |
| 7911017 | Direct glass attached on die optical module An optical module includes an image sensor having an active area and a window mounted directly to the image sensor above the active area. The optical module further includes a mount mounted to the window, the mount supporting a barrel having a lens assembly. By moun... | 03/22/2011 |
| 7902660 | Substrate for semiconductor device and manufacturing method thereof A substrate for a semiconductor device and a manufacturing thereof, and a semiconductor device using the same and a manufacturing method thereof are disclosed. For example, in the substrate according to the present invention, a core is eliminated, so that the substr... | 03/08/2011 |
| 7898093 | Exposed die overmolded flip chip package and fabrication method An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. Th... | 03/01/2011 |
| 7878946 | Spinning bike power meter An exercise bicycle includes a flywheel, a drive train coupled to the flywheel, and pedals coupled to the drive train. A user of the exercise bicycle expends power by exerting force on the pedals to spin the flywheel. The exercise bicycle further includes a power me... | 02/01/2011 |
| 7872341 | Semiconductor device A semiconductor package comprises a plurality of stacked semiconductor chips having the same structure. Therefore, the semiconductor chips can be produced using masks of the same design, resulting in a reduction in production cost and an improvement in productivity.... | 01/18/2011 |
| 7863723 | Adhesive on wire stacked semiconductor package A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is... | 01/04/2011 |
| 7859119 | Stacked flip chip die assembly A stack of semiconductor dies is disclosed. A first stack level includes a first semiconductor die and at least one first support that are attached to a substrate surface. A second level includes a second semiconductor die and at least one second support that are at... | 12/28/2010 |
| 7859107 | Solder attach film and assembly A solder attach film includes a first cover film, a flux layer, a solder layer, and a second cover film, and it can be treated or kept in a roll shape. A solder ball forming method using the solder attach film includes preparing a semiconductor package or a semicond... | 12/28/2010 |
| 7843072 | Semiconductor package having through holes Disclosed is a semiconductor package. The semiconductor package is configured to form a plurality of through holes for forming a through silicon via at once using a sawing device used for wafer sawing instead of a separate laser drilling equipment or a deep reactive... | 11/30/2010 |
| 7843052 | Semiconductor devices and fabrication methods thereof Semiconductor devices are disclosed. In an embodiment, a plurality of second semiconductor dies formed with through-silicon vias are stacked on a first semiconductor die. The stack of the second semiconductor dies is encapsulated by an encapsulant. Redistribution la... | 11/30/2010 |
| 7842541 | Ultra thin package and fabrication method A method includes forming a substrate layer, the substrate layer including a circuit pattern having terminals and bump pads. A stiffener is formed, the stiffener including via apertures having electrically conductive via aperture sidewalls and an electronic componen... | 11/30/2010 |