A method of swing on a swing is disclosed, in which a user positioned on a standard swing suspended by two chains from a substantially horizontal tree branch induces side to side motion by pulling alternately on one chain and then the other.
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| Number | Title | Issue Date |
| 7925862 | Coprocessor forwarding load and store instructions with displacement to main processor for cache coherent execution when program counter value falls within predetermined ranges A coprocessor (14) may be used to perform one or more specialized operations that can be off-loaded from a primary or general purpose processor (12). It is important to allow efficient communication and interfacing between the processor (12) and... | 04/12/2011 |
| 7893696 | Pulse circuit using a transmission line A circuit is provided wherein a test pulse is provided to a device under test. A module allows the test pulse to pass through to the device under test. The module blocks a reflected pulse from passing through to the device under test when the reflected pulse has an ... | 02/22/2011 |
| 7880650 | Method and apparatus for testing data converter A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data conv... | 02/01/2011 |
| 7879663 | Trench formation in a semiconductor material A semiconductor device is formed on a semiconductor layer. A gate dielectric layer is formed over the semiconductor layer. A layer of gate material is formed over the gate dielectric layer. The layer of gate material is patterned to form a gate structure. Using the ... | 02/01/2011 |
| 7876254 | Data conversion circuitry having successive approximation circuitry and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data conv... | 01/25/2011 |
| 7869558 | Method and apparatus for calibrating a counting circuit Timing circuitry may use control circuitry to control calibration circuitry to calibrate a counter so that an adder and a calibration period counter are not required. Concatenation circuitry may be used to concatenate a portion of the counter value and the calibrati... | 01/11/2011 |
| 7868796 | Self-calibrating data conversion circuitry and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data conv... | 01/11/2011 |
| 7868795 | Data conversion circuitry with an extra successive approximation step and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data conv... | 01/11/2011 |
| 7859299 | Circuit for controlling data communication with synchronous storage circuitry and method of operation A method and circuit includes providing at least one conductor for receiving an input signal. A termination circuit and a clamp circuit are coupled to the at least one conductor. The termination circuit is enabled while the clamp circuit remains enabled. The clamp c... | 12/28/2010 |
| 7859068 | Integrated circuit encapsulation and method therefor A device (12) may have a pressure sensitive portion (17) which is protected from corrosion by a pressure transmitting material (20). Pressure transmitting material (20) may also be used to transmit pressure to pressure sensitive portion (... | 12/28/2010 |
| 7858487 | Method and apparatus for indicating directionality in integrated circuit manufacturing An integrated circuit includes a visually discernable indicator formed as part of the integrated circuit to indicate a directionality of a non-visually discernable characteristic of the integrated circuit. ... | 12/28/2010 |
| 7830066 | Micromechanical device with piezoelectric and electrostatic actuation and method therefor A MEMS device uses both piezoelectric actuation and electrostatic actuation and also provides enough electrostatic force to enable very low voltage operation. As the electrostatic actuation uses DC and the piezoelectric actuation uses high frequency, the structure o... | 11/09/2010 |
| 7824988 | Method of forming an integrated circuit A method includes forming a source, a drain, and a disposable gate (38) of the first transistor; forming a source, a drain, and a disposable gate of the second transistor; removing the disposable gates of the first transistor and the second transistor; formin... | 11/02/2010 |
| 7820520 | Semiconductor device with capacitor and/or inductor and method of making An integrated circuit has a plurality of terminals for making electrical connection to the integrated circuit. At least one device is formed adjacent an outer edge of the integrated circuit. The device includes at least one metal conductor for forming an edge seal f... | 10/26/2010 |
| 7814300 | Configurable pipeline to process an operation at alternate pipeline stages depending on ECC/parity protection mode of memory access A method includes providing a data processor having an instruction pipeline, where the instruction pipeline has a plurality of instruction pipeline stages, and where the plurality of instruction pipeline stages includes a first instruction pipeline stage and a secon... | 10/12/2010 |
| 7808117 | Integrated circuit having pads and input/output (I/O) cells A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not... | 10/05/2010 |
| 7804258 | Circuit for providing an approximately constant resistance and/or current and method therefor A circuit can provide an approximately constant resistance value that is virtually independent of process and temperature variations. A current control circuit may use a device that tracks the changes in a corresponding device over process and temperature variations... | 09/28/2010 |
| 7802038 | Communication steering for use in a multi-master shared resource system New approaches for providing communication between multiple masters (12, 14) and one or more shared resources (24, 30, 100) are needed. One example of a resource that may need to be shared is circuitry complying with the Universal Serial Bus (USB) stan... | 09/21/2010 |
| 7787323 | Level detect circuit A detect circuit may be used to detect one or more characteristics corresponding to the fuse being programmed. When the one or more characteristics of the fuse being programmed reach the desired states or values, the programming of the fuse is discontinued. Thus, th... | 08/31/2010 |
| 7777998 | Electrostatic discharge circuit and method therefor Circuitry on integrated circuits usually includes protection against electrostatic discharge (ESD) events. A second ESD current path may be provided in addition to a first ESD current path for shunting ESD current away from circuitry to be protected during an ESD ev... | 08/17/2010 |
| 7777509 | Method and apparatus for electrical testing A test apparatus and device under test has a probe that can be located very close to contact pads and that requires very few solder connections. In addition, the probe can be configured to meet any appropriate and desired electrical specification while still using a... | 08/17/2010 |
| 7746716 | Memory having a dummy bitline for timing control A memory having at least one memory array block, the at least one memory array block comprising N wordlines, wherein N is greater than one, is provided. The memory comprises a plurality of sense amplifiers coupled to the at least one memory array block. The memory f... | 06/29/2010 |
| 7739674 | Method and apparatus for selectively optimizing interpreted language code In one embodiment of the present invention an interpreted language, such as, for example, Java, is selectively optimized by partitioning the interpreted language code (98) into a plurality of blocks (80-83) based on the complexity of each of the... | 06/15/2010 |
| 7733258 | Data conversion circuitry for converting analog signals to digital signals and vice-versa and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data conv... | 06/08/2010 |
| 7689815 | Debug instruction for use in a data processing system A method includes providing a debug instruction and providing a debug control register field, where if the debug control register field has a first value, the debug instruction executes a debug operation and where if the debug control register field has a second val... | 03/30/2010 |
| 7687354 | Fabrication of a semiconductor device with stressor In a semiconductor fabrication process, an epitaxial layer is formed overlying a substrate, wherein there is a lattice mismatch between the epitaxial layer and the substrate. A hard mask having an opening is formed overlying the epitaxial layer. A recess is formed t... | 03/30/2010 |
| 7681078 | Debugging a processor through a reset event A method for operating a processor in data processing system comprises: asserting a debug control signal to cause the processor to enter a debug operating mode; initializing a plurality of shared processor resources with debug configuration information, wherein the ... | 03/16/2010 |
| 7669100 | System and method for testing and providing an integrated circuit having multiple modules or submodules In an integrated circuit having a plurality of modules and/or submodules that each performs a substantially same function, defective modules and/or submodules are determined by creating a test signature from an input test pattern. The output of each module and/or su... | 02/23/2010 |
| 7638903 | Power supply selection for multiple circuits on an integrated circuit An integrated circuit comprising a plurality of circuits is provided. The integrated circuit further comprises a plurality of power circuits, wherein each of the plurality of power circuits can supply a selected voltage to at least one of the plurality of circuits. | 12/29/2009 |
| 7635920 | Method and apparatus for indicating directionality in integrated circuit manufacturing An integrated circuit includes a visually discernable indicator formed as part of the integrated circuit to indicate a directionality of a non-visually discernable characteristic of the integrated circuit. ... | 12/22/2009 |
| 7632698 | Integrated circuit encapsulation and method therefor A device (12) may have a pressure sensitive portion (17) which is protected from corrosion by a pressure transmitting material (20). Pressure transmitting material (20) may also be used to transmit pressure to pressure sensitive portion (... | 12/15/2009 |
| 7629220 | Method for forming a semiconductor device and structure thereof A non-planar semiconductor device (10) starts with a silicon fin (42). A source of germanium (e.g. 24, 26, 28, 30, 32) is provided to the fin (42). Some embodiments may use deposition to provide germanium; some embodiments may use ion imp... | 12/08/2009 |
| 7626276 | Method and apparatus for providing structural support for interconnect pad while allowing signal conductance A method provides an interconnect structure having enhanced structural support when underlying functional metal layers are insulated with a low modulus dielectric. A first metal layer having a plurality of openings overlies the substrate. A first electrically insula... | 12/01/2009 |
| 7615806 | Method for forming a semiconductor structure and structure thereof Forming a semiconductor structure includes providing a substrate having a strained semiconductor layer overlying an insulating layer, providing a first device region for forming a first plurality of devices having a first conductivity type, providing a second device... | 11/10/2009 |
| 7608898 | One transistor DRAM cell structure A one-transistor dynamic random access memory (DRAM) cell includes a transistor which has a first source/drain region, a second source/drain region, a body region between the first and second source/drain regions, and a gate over the body region. The first source/dr... | 10/27/2009 |
| 7599432 | Method and apparatus for dynamically inserting gain in an adaptive filter system A method and apparatus for dynamically inserting gain in an adaptive filter is taught. This selective insertion of gain may be used to allow an adaptive filter to converge more quickly and/or to overcome inherent limitations of the adaptive filter. An echo canceller... | 10/06/2009 |
| 7584344 | Instruction for conditionally yielding to a ready thread based on priority criteria An integrated circuit (10) has a conditional yield instruction (305) which may be used to conditionally yield execution of a currently active thread based on priority and status of other threads. In one embodiment, an I bit 304 may be used to de... | 09/01/2009 |
| 7583554 | Integrated circuit fuse array The fuse array described herein is very compact and uses little semiconductor area because of its crosspoint architecture. The disclosed crosspoint architecture reduces the number of conductors that must be run horizontally or vertically through each bit cell. As a ... | 09/01/2009 |
| 7581151 | Method and apparatus for affecting a portion of an integrated circuit In one embodiment, an integrated circuit which uses one or more re-useable modules may use a signature generated by a duplicate state machine or an unmodified state machine to select, control, or otherwise affect a resource on the integrated circuit, where affecting... | 08/25/2009 |
| 7580288 | Multi-level voltage adjustment An adjustable voltage supply (310) may have a plurality of levels of adjustment, such as a coarse select circuit (471) and a fine select circuit (473), to generate an adjustable voltage (e.g. Vout 364 of FIGS. 3 and 4) with ... | 08/25/2009 |