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| Number | Title | Issue Date |
| 5053639 | Symmetrical clock generator and method A device and method for generating a symmetrical clock signal. The device comprises a signal generator, buffer and differential amplifier. The signal generator generates a periodic wave signal. The buffer receives the periodic wave signal and provides a s... | 10/01/1991 |
| 5043633 | Circuit and method for regulating the current flow in a distributorless ignition system coil A control circuit and method for regulating the current flow through a series connected inductor and transistor. The circuit comprises an operational amplifier for receiving a first voltage proportional to the current flow, for receiving a variable second... | 08/27/1991 |
| 5041741 | Transient immune input buffer A transient immune bistable input buffer circuit. The circuit comprises a filter connected between an input and a reference voltage terminal to the circuit for reducing the sensitivity of the circuit to a voltage transient on the terminal.... | 08/20/1991 |
| 5040053 | Cryogenically cooled integrated circuit apparatus A cryogenically cooled integrated circuit apparatus is disclosed. The apparatus includes a cryogenic vessel with an integrated circuit package positioned in an opening at one end. One face of the integrated circuit is in direct contact with cryogenic flui... | 08/13/1991 |
| 5029283 | Low current driver for gate array A low current output driver for a gate array. The driver has first and second reference voltage sources, a first transistor of a first conductivity type, and a plurality of second transistors of a second conductivity type. The first transistor is connecte... | 07/02/1991 |
| 4994685 | Regulated power supply and method The subject invention is a power supply comprising a magnetic amplifier, filter, back-up battery, switch-over regulating circuit and error amplifier. The magnetic amplifier receives a plurality of AC pulses and controls the pulse width of the pulses. The ... | 02/19/1991 |
| 4986879 | Structure and process for forming semiconductor field oxide using a sealing sidewall of consumable nitride An integrated circuit structure and fabrication process for creating field oxide regions having substantially no bird's beak, a relatively planar concluding surface, substantially no stress induced dislocations at the edges of the active regions, and a su... | 01/22/1991 |
| 4968906 | Clock generating circuit for asynchronous pulses A circuit for generating clock and control signals from first and second asynchronous binary signals. The circuit generates first and second pulse signals responsive to the first and second asynchronous binary signals, a clock pulse signal responsive to t... | 11/06/1990 |
| 4951400 | Method for processing plastic packaged electronic devices The subject invention is a method for processing a plastic packaged electronic device with soldered leads. The solder has a critical temperature which if exceeded more than once results in its oxidation. The method comprises protecting the device with a c... | 08/28/1990 |
| 4944007 | Public key diversification method A method is disclosed whereby individual members of a group of members or entities may be provided, under the control of a trusted member, referred to as the parent, with respective individual secret keys for use in public key cryptography, such that the ... | 07/24/1990 |
| 4941157 | Slow peripheral handshake interface circuit The subject invention is an interface circuit between a requesting device and a responding device. The circuit comprises a flip-flop responsive to a request signal received from the requesting device and a handshake signal received from the responding dev... | 07/10/1990 |
| 4935962 | Method and system for authentication An entity such as a smart card includes microprocessor means, input/output means, and PROM storage means which stores a set of transformations Si (i=1, . . . , n) of a corresponding set of public factors F1 (i=1, . . . , n), where S | 06/19/1990 |
| 4933894 | Circuit and method for adding binary numbers with a difference of one or less The subject invention is a circuit and method of providing the sum of first and second n bit binary numbers having a difference of one or less. The method comprises combining the least significant bits of the numbers in a first coincidence gate to provide... | 06/12/1990 |
| 4918329 | Data transmission system A data transmission system for transferring data signals between first and second buses is disclosed. The system includes means attached to the buses for the transfer of data signals to the buses and supply means connected to the buses for precharging the... | 04/17/1990 |
| 4907977 | Computer backpanel inversion coupler An inversion coupler for use in a computer system is disclosed. The computer system has a backpanel with a front side for the mounting of printed circuit boards each with a plurality of rows of connector pins. The inversion coupler mounts one of the print... | 03/13/1990 |
| 4888501 | ECL to CMOS converter The subject invention is an ECL to CMOS converter for converting high or low ECL logic signals. The converter comprises a CMOS inverter for providing low or high CMOS logic signals at its output in response to a first or second signal, respectively, appli... | 12/19/1989 |
| 4888499 | Three input exclusive OR-NOR gate circuit A three input Exclusive OR-NOR gate circuit. The circuit comprises inverters for receiving three input signals and for providing three inverted input signals, a power potential terminal, a reference potential terminal, and an Exclusive NOR output node and... | 12/19/1989 |
| 4872505 | Heat sink for an electronic device A heat sink for conducting heat from an electronic device is disclosed. The device has a mounting base and two U-shaped members. Each U-shaped member has first and second walls integral with a top ridge. The first wall is integral with the base and extend... | 10/10/1989 |