Dining Table Having Integral Dishwasher
A space-saving dishwasher, which may be installed within a counter top or table, having a dish-carrying rack that is vertically shiftable through the open top of the dishwasher for facilitating loading and unloading of the dishes.
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| Number | Title | Issue Date |
| 7944750 | Multi-programmable non-volatile memory cell A non-volatile memory device and method for manufacture and programing which does not require a control gate for the programing or erasure of the device. The memory device is comprised of two wells with the opposite conductivity type of the semiconductor body. In on... | 05/17/2011 |
| 7936577 | Match line precharge circuits and methods for content addressable memory (CAM) device A content addressable memory (CAM) may include a plurality of precharge circuits, each coupled to a group of CAM cells and comprising a first precharge path that is temporarily enabled in response to an activated first control signal, and a second precharge path tha... | 05/03/2011 |
| 7917694 | Method and system for finding maximal stripes in cache memory with content addressable memory A storage system and method of operating the same can speed the operation of cache management functions. Generally, a storage system can include data stored in stripes, with each stripe including a number of blocks. A cache memory can store data blocks for fast acce... | 03/29/2011 |
| 7911261 | Substrate bias circuit and method for integrated circuit device A substrate biasing circuit may include a first pump control circuit that generates a first control signal in response to a first reference voltage and a voltage of a first substrate portion, and includes a first reference generator coupled between a temperature com... | 03/22/2011 |
| 7908461 | Cellular engine for a data processing system A data processing system includes an associative memory device containing n-cells, each of the n-cells includes a processing circuit. A controller is utilized for issuing one of a plurality of instructions to the associative memory device, while a clock device is ut... | 03/15/2011 |
| 7904643 | Range code compression method and apparatus for ternary content addressable memory (CAM) devices A content addressable memory (CAM) device, method, and method of generating entries for range matching are disclosed. A CAM device (800) according to one embodiment can include a pre-encoder (806) that encodes range bit values W into additional bits E.... | 03/08/2011 |
| 7897127 | Collecting particles from a fluid stream via thermophoresis A method of collecting particles from a gas-particle stream having a first temperature and a plurality of particles, the method comprising: cooling an interior surface of a collection chamber to a second temperature less than the first temperature of the gas-particl... | 03/01/2011 |
| 7895334 | Remote access communication architecture apparatus and method Disclosed herein is a system and method for communicating data from a base computer to a remote device via a central server system without the necessity of specialty software on the remote device. Remote devices such as laptop computers and cellular telephones commu... | 02/22/2011 |
| 7865922 | Low-power broadcast receiver Broadcast receivers operate in a power-saving standby mode while retaining the ability to receive broadcast program, software, and firmware updates. The most power hungry circuits are deprived of power in the standby mode using a wake-up switch controlled by an upda... | 01/04/2011 |
| 7852652 | Match line precharge circuits and methods for content addressable memory (CAM) device A content addressable memory (CAM) device can include a number of match lines, each coupled to a plurality of CAM cells. The CAM device also includes one or more one precharge circuits. Such a precharge circuit can have a first precharge path that couples a match li... | 12/14/2010 |
| D627900 | Glove box | 11/23/2010 |
| 7836246 | Method and apparatus for overlaying flat and/or tree based data sets onto content addressable memory (CAM) device A content addressable memory device (100) and method can have CAM blocks (102-0 to 102-29) organized in block sections (104-0 to 104-6). In an overlay mode of operation, an overlay engine (106) ca... | 11/16/2010 |
| 7831038 | Smart interface technology The present invention overcomes interface problems between proprietary handset ports on telephone base units and voice/data accessory products by allowing a user to automatically calibrate the telephone accessory product for an optimal interface match with the inten... | 11/09/2010 |
| 7818435 | Reverse proxy mechanism for retrieving electronic content associated with a local network A method and apparatus for processing requests for delivery of electronic content is provided. According to one aspect of the invention, a request for delivery of first electronic content is received, where (1) the request is for delivery of the first electronic con... | 10/19/2010 |
| 7814268 | Row expansion reduction by inversion for range representation in ternary content addressable memories A method and circuit to implement a match against range rule functionality. A first rule entry and a second rule entry are stored. The first rule entry includes at least two consecutive identical bits. The first rule entry represents a numerical range. A first field... | 10/12/2010 |
| 7814267 | Processor with compare operations based on any of multiple compare data segments A processor device integrated circuit can include a plurality of storage locations logically configurable into at least one database. Such a database can include a number of records, record having a selectable size of up to F multi-bit segments, where F is an intege... | 10/12/2010 |
| 7814266 | Partial row expansion by logically combining range representation values in content addressable memory A method and apparatus to reduce the number of rule entries used to implement ranging matching in a Content Addressable Memory (“CAM”) array. A first CAM entry is stored in a single CAM cell of an array of CAM cells. The first CAM entry is compared with a first ... | 10/12/2010 |
| 7813155 | Content addressable memory (CAM) cell having column-wise conditional data pre-write A content addressable memory (CAM) device can include a plurality of CAM cells arranged in rows and columns to form multi-byte words. Each CAM cell can include a comparator circuit and one or more data storing circuits. Each comparator circuit can have one or more c... | 10/12/2010 |
| 7808294 | Level shifter with balanced rise and fall times A level shifting circuit can include a shift stage that latches first and second internal nodes to opposite shifted logic potentials in response to different transitions at an input signal node. The input signal node can vary between non-shifted logic potentials. An... | 10/05/2010 |
| 7804332 | Circuit configurations having four terminal JFET devices Circuits using four terminal junction field effect transistors (JFETs) are disclosed. Such circuits can include various static and dynamic logic circuits, flip-flops, multiplexer, tri-state driver, phase detector, logic having variable speeds of operation, and/or an... | 09/28/2010 |
| 7800930 | Precharge circuits and methods for content addressable memory (CAM) and related devices An integrated circuit device can include a plurality of compare cell circuits that selectively provide charge transfer path between a result line and a reference node according to a comparison between a stored data value and an applied compare data value during a co... | 09/21/2010 |
| D623037 | Radial foldout tool | 09/07/2010 |
| 7782645 | Selective encoding of data values for memory cell blocks An integrated circuit device can include a plurality of configuration storage locations each comprising at least one encoding field. Each encoding field can selectively enable at least one received data value to be encoded into an encoded data value prior to being a... | 08/24/2010 |
| 7782084 | Integrated circuit with reconfigurable inputs/outputs An integrated circuit device can include a core section coupled to a plurality of signal paths having a predetermined physical order with respect to one another. A configuration circuit can selectively connect each signal path to a corresponding one of a plurality o... | 08/24/2010 |
| 7767145 | High pressure fourier transform infrared cell A monitoring system enables in-situ monitoring of a solution enclosed within a high-pressure, closed loop environment. The monitoring system includes a calcium fluoride disk that is substantially transparent to infrared light. A hole is configured through the disk a... | 08/03/2010 |
| 7764137 | Circuit and method for generating electrical solutions with junction field effect transistors A circuit can include an amplifier having at least a first junction field effect transistor (JFET) of a first conductivity type with a source coupled to a first power supply node, and a drain coupled to an amplifier output node. A first variable bias circuit can be ... | 07/27/2010 |
| 7727821 | Image sensing cell, device, method of operation, and method of manufacture An image sensing device can include one or more image sensing cells. Each image sensing cell can have a charge store element formed from a semiconductor material doped to a first conductivity type. The charge store element can be in contact with a channel region for... | 06/01/2010 |
| 7720160 | Phase noise shaping using sigma delta modulation in a timing recovery unit A method and apparatus for converting a high precision digital word into a high precision analog signal is disclosed. A sigma delta modulator applies a digital input signal to a dither signal to generate a combined signal for sampling. A digital-to-analog converter ... | 05/18/2010 |
| 7717574 | Method for simplifying the imaging of objects with non-Lambertian surfaces For objects with non-Lambertian surfaces, an object surface is mapped by effectively modifying the reflective properties of the object surface being sensed. By effectively making the surface Lambertian with high albedo, a calibration imaging task is achieved using a... | 05/18/2010 |
| 7711893 | Range code compression method and apparatus for ternary content addressable memory (CAM) devices A content addressable memory (CAM) device, method, and method of generating entries for range matching are disclosed. A CAM device (800) according to one embodiment can include a pre-encoder (806) that encodes range bit values W into additional bits E.... | 05/04/2010 |
| 7710148 | Programmable switch circuit and method, method of manufacture, and devices and systems including the same A switching circuit can include a logic circuit having a logic circuit input and a logic circuit output and at least three input transistors coupled to provide three separate paths between three input/output (I/O) nodes and the logic circuit input. The switching cir... | 05/04/2010 |
| 7692220 | Semiconductor device storage cell structure, method of operation, and method of manufacture The invention can include at least one storage cell having a store gate structure formed from a semiconductor material doped to a first conductivity type and in contact with a channel region comprising a semiconductor material doped to a second conductivity type. A ... | 04/06/2010 |
| 7646233 | Level shifting circuit having junction field effect transistors A level shifting circuit can include a first driver junction field effect transistor (JFET) having a source coupled to a reference supply node and a second driver JFET of a second conductivity type having a source coupled to a boosted supply node, and a first charge... | 01/12/2010 |
| 7629812 | Switching circuits and methods for programmable logic devices A switching circuit can have a plurality of first signal lines of a programmable logic device, a plurality of second signal lines of the programmable logic device, and a plurality of switch elements. Each switch element can selectively couple one first signal line t... | 12/08/2009 |
| 7612488 | Method to control BAW resonator top electrode edge during patterning A piezoelectric resonator include a multi-layer top electrode. The multi-layer top electrode includes at least a top metal layer and a bottom metal layer. A top metal layer edge is recessed compared to a bottom metal layer edge allowing conformal deposition of a pas... | 11/03/2009 |
| 7592841 | Circuit configurations having four terminal JFET devices Circuits using four terminal junction field effect transistors (JFETs) are disclosed. Such circuits can include various static and dynamic logic circuits, flip-flops, multiplexer, tri-state driver, phase detector, logic having variable speeds of operation, and/or an... | 09/22/2009 |
| 7577784 | Full-ternary content addressable memory (CAM) configurable for pseudo-ternary operation A ternary content addressable memory (TCAM) system and method of operating the same can enable a user to configure the system to operate as either a pseudo TCAM or full TCAM system. Control logic (206) can have an address modification circuit (250) cou... | 08/18/2009 |
| 7570503 | Ternary content addressable memory (TCAM) cells with low signal line numbers A ternary content addressable memory (TCAM) cell circuit formed in a TCAM memory cell array having cells arranged in rows and columns can include a first storage circuit with first and second data path, a second storage circuit with a third and fourth data path, and... | 08/04/2009 |
| 7565482 | Method and device for scalable multiple match extraction from search data A search engine system (100) compares search key values to stored entry values, and includes first blocks of entries (102) and second blocks of entries (104). First blocks of entries (102) can be “search” blocks that can provide a rel... | 07/21/2009 |
| 7565481 | Content addressable memory (CAM) device and method for flexible suppression of hit indications A content addressable memory (CAM) device (200) can provide for suppression of hit indications. Prioritized match indications (212) can be applied in parallel to both an encoding read-only-memory (ROM) (204-1) and suppression data store (... | 07/21/2009 |