Bizarre Patents
Hands free towel carrying system
A hands free towel carrying system for coupling a towel to a user to prevent loss, theft or contamination.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7934188 | Legalization of VLSI circuit placement with blockages using hierarchical row slicing A hierarchical method of legalizing the placement of logic cells in the presence of blockages selectively classifies the blockages into at least two different sets based on size (large and small). Movable logic cells are relocated first among coarse regions between ... | 04/26/2011 |
| 7890905 | Slew constrained minimum cost buffering A buffer insertion technique addresses slew constraints while minimizing buffer cost. The method builds initial solutions for the sinks, each having an associated cost, slew and capacitance. As a solution propagates toward a source, wire capacitance and wire slew ar... | 02/15/2011 |
| 7885798 | Closed-loop modeling of gate leakage for fast simulators A method for circuit simulation using a netlist in which a first device having an unmodeled, nonlinear behavior is modified by inserting a second device which has a nonlinear response approximating the unmodeled nonlinear behavior. The first device may be for exampl... | 02/08/2011 |
| 7881135 | Method for Qmeasurement in bulk CMOS using a switched capacitor circuit A test setup for estimating the critical charge of a circuit under test (CUT) uses a charge injection circuit having a switched capacitor that is selectively connected to a node of the CUT. A voltage measurement circuit measures the voltage at a tap in the charge in... | 02/01/2011 |
| 7847618 | Peak power reduction methods in distributed charge pump systems A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal di... | 12/07/2010 |
| 7864625 | Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator A delay circuit has a fixed delay path at a lower voltage level, a level converter, and an adjustable delay path at a higher voltage level. The fixed delay path includes an inverter chain, and the adjustable delay path includes serially-connected delay elements sele... | 01/04/2011 |
| 7834649 | Method and apparatus for statistical CMOS device characterization A unified test structure having a large number of electronic devices under test is used to characterize both capacitance-voltage parameters (C-V) and current-voltage parameters (I-V) of the devices. The devices are arranged in an array of columns and rows, and selec... | 11/16/2010 |
| 7827514 | Efficient electromagnetic modeling of irregular metal planes A method of modeling electromagnetism in an irregular conductive plane, by dividing the surface into a grid of unequal and unaligned rectangles, assigning a circuit node location to a center of each rectangle, and calculating capacitive and inductive parameters base... | 11/02/2010 |
| 7782076 | Method and apparatus for statistical CMOS device characterization A unified test structure having a large number of electronic devices under test is used to characterize both capacitance-voltage parameters (C-V) and current-voltage parameters (I-V) of the devices. The devices are arranged in an array of columns and rows, and selec... | 08/24/2010 |
| 7774732 | Method for radiation tolerance by automated placement A method of designing a layout of an integrated circuit for increased radiation tolerance by ensuring that any critical components (those deemed particularly sensitive to radiation-induced soft errors) are at spacings greater than a predetermined threshold based on ... | 08/10/2010 |
| 7760010 | Switched-capacitor charge pumps A switched-capacitor charge pump comprises a two-phase charging circuit, cross-coupled transistors connected to output nodes of the switched capacitors, and a pump output connected to source terminals of the cross-coupled transistors. The charge pump has side transi... | 07/20/2010 |
| 7743107 | System and method for using remote module on VIOS to manage backups to remote backup servers A system, method, and program product is provided that receives a backup request at a virtual input/output server (VIOS) from a client of the VIOS. The backup request corresponds to a virtual nonvolatile storage that is used by the client. The VIOS retrieves data fr... | 06/22/2010 |
| 7734970 | Self-resetting, self-correcting latches A latch circuit having three latch stages generates a majority output value from the stages, senses when the latch stage outputs are not all equal, and feeds the majority output value back to inputs of the latch stages to reload the latch stages. The latch circuit u... | 06/08/2010 |
| 7725870 | Method for radiation tolerance by implant well notching A logic book for a programmable device such as an application-specific integrated circuit (ASIC) achieves improved radiation tolerance by providing notches in an implant well between adjacent transistors and fills the notches with complementary well regions that act... | 05/25/2010 |
| 7698681 | Method for radiation tolerance by logic book folding A logic book for a programmable device such as an application-specific integrated circuit (ASIC) achieves improved radiation tolerance by providing transistors of the same doping type in different well regions that are physically isolated by intervening well regions... | 04/13/2010 |
| 7681054 | Processing performance improvement using activity factor headroom Processing system performance is improved while meeting power management constraints in a processing system by using activity factor headroom estimation. The method and system estimate the power consumption of the system from a model that relates measured activities... | 03/16/2010 |
| 7676780 | Techniques for super fast buffer insertion A method of determining buffer insertion locations in an integrated circuit design establishes candidate locations for inserting buffers into a net, and selects buffer insertion locations from among the candidates based on slew constraints. The selection of buffer i... | 03/09/2010 |
| 7676203 | Method and apparatus for dynamically tuning radio stations with user-defined play lists A method, apparatus, and computer instructions for dynamic radio station tuning in a data processing system. A play list is identified. The play list is a user-defined list and includes an identification of a number of songs. Music information is obtained from a plu... | 03/09/2010 |
| 7673284 | Method and system for versioning codes based on relative alignment for single instruction multiple data units A method and system for generating efficient versioned codes for single instruction multiple data units whose memory systems have alignment constraints. The system creates multiple versions of codes based on relative alignments of the data streams involved in the co... | 03/02/2010 |
| 7672247 | Evaluating data processing system health using an I/O device A computer implemented method, apparatus, and computer usable program code for monitoring health of a data processing system. A determination is made whether a response is received within a first time period in response to an I/O device sending a receive descriptor ... | 03/02/2010 |
| 7669038 | Method and apparatus for back to back issue of dependent instructions in an out of order issue queue A method is provided for evaluating two or more instructions in an out of order issue queue during a particular cycle of the queue, to select an instruction for issue during the next following cycle. If an instruction was previously designated to issue during the pa... | 02/23/2010 |
| 7668037 | Storage array including a local clock buffer with programmable timing A storage array including a local clock buffer with programmable timing provides a mechanism for evaluating circuit timing internal to the storage array. The local clock buffer can independently adjust the pulse width of a local clock that controls the wordline and ... | 02/23/2010 |
| 7667513 | Digital duty cycle corrector A circuit and method of correcting the duty cycle of digital signals is disclosed. The duty cycle of an input digital signal is measured and compared to a desired duty cycle. The leading edge of the input digital signal is passed to an output. The circuit and method... | 02/23/2010 |
| 7667217 | Apparatus for observing and capturing latent images on objects, and method for using same An apparatus for easily shooting an invisible image (such as an invisible two-dimensional bar code) latent on an object. The operation of the apparatus is made intuitive and simple and may be incorporated into cameras peripheral to computers and mobile telephones. A... | 02/23/2010 |
| 7659749 | Pulsed dynamic logic environment metric measurement circuit A pulsed dynamic logic environment metric measurement circuit provides self-referenced, low area/cost and low power measurement of circuit environment metrics, such as supply voltage. A cascade of dynamic logic stages is clocked with a pulse having a width substanti... | 02/09/2010 |
| 7657663 | Migrating stateless virtual functions from one virtual plane to another Mechanisms for migration stateless virtual functions from one virtual plane to another are provided. When a migration of a source virtual function to a destination virtual function in another virtual plane is to be performed, a source single root PCI manager (SR-PCI... | 02/02/2010 |
| 7650491 | Method and system for controlled distribution of application code and content data within a computer network A secure communication methodology is presented. The client device is configured to download application code and/or content data from a server operated by a service provider. Embedded within the client is a client private key, a client serial number, and a copy of ... | 01/19/2010 |
| 7647413 | System for providing on-demand media streaming from a user's own library to a receiving device of the user A system and method are provided for on-demand media streaming from a user's own media library to a user's receiving device that may be located in a different location from that where the media library is stored. The present invention provides an out-of-the box on-d... | 01/12/2010 |
| 7640194 | Inventory controls with radio frequency identification Inventory control with inventory item attributes wherein the attributes describe an inventory item, the inventory item has an RFID identification tag having an RFID identification tag code, and the inventory item attributes include an RFID identification tag code fi... | 12/29/2009 |
| 7636556 | Digital transmission circuit and method providing selectable power consumption via multiple weighted driver slices A digital transmission circuit and method providing selectable power consumption via multiple weighted driver slices improves the flexibility of an interface while reducing power consumption when possible. A cascaded series of driver stages is provided by a set of p... | 12/22/2009 |
| 7631228 | Using bit errors from memory to alter memory command stream A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory, error correction code is received from the memory. Bit errors are ident... | 12/08/2009 |
| 7627840 | Method for soft error modeling with double current pulse A method of modeling soft errors in a logic circuit uses two separate current sources inserted at the source and drain of a device to simulate a single event upset (SEU) caused by, e.g., an alpha-particle strike. In an nfet implementation the current flows from the ... | 12/01/2009 |
| 7624366 | Clock aware placement The layout of latches in a common clock domain is efficiently optimized to shrink the physical size of the domain while maintaining timing requirements. The latches are placed in a first layout preferably using quadratic placement, and a star object is built represe... | 11/24/2009 |
| 7622942 | Method and apparatus for measuring device mismatches A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to... | 11/24/2009 |
| 7620510 | Pulsed ring oscillator circuit for storage cell read timing evaluation A pulsed ring oscillator circuit for storage cell read timing evaluation provides read strength information. A pulse generator is coupled to a bitline to which the storage cell to be measured is connected. The storage cell thereby forms part of the ring oscillator a... | 11/17/2009 |
| 7617377 | Splitting endpoint address translation cache management responsibilities between a device driver and device driver services Mechanisms for splitting responsibilities for communicating with an endpoint between a device driver and device driver services are provided. With these mechanisms, the device driver is responsible for managing queues for communicating requests between applications ... | 11/10/2009 |
| 7617361 | Configureable redundant array of independent disks A computer implemented method, data processing system, and computer program product for maximizing the amount of data protected in a Redundant Array of Independent Disks (RAID) storage system. When a request to configure a plurality of physical disk drives into a Re... | 11/10/2009 |
| 7617283 | System and method for instant messaging A system and method for user-defined control of the operation and appearance of a computerized instant messaging service and associated user interface is disclosed, providing ease of use, control over presentation and access to instant messaging services, particular... | 11/10/2009 |
| 7600027 | Managing multiple sessions for a user of a portal Methods for managing multiple sessions for a user on a portal are disclosed. More particularly, hardware and/or software for managing multiple user sessions with backend applications of a portal are disclosed. Embodiments include a portal having a client interaction... | 10/06/2009 |
| 7598774 | Reduced power consumption limited-switch dynamic logic (LSDL) circuit An limited-switch dynamic logic (LSDL) circuit provides reduced power consumption by reducing clock power dissipation. By clocking LSDL gates with a clock signal having a reduced voltage swing in the evaluation phase, the LSDL gates are permitted to operate, while r... | 10/06/2009 |
