Bizarre Patents
Method and apparatus for making a drink hop along a bar or counter
A method for generating a drink which appears to hop from a remote spot on the bar or counter and take one or more leaps, before landing in a patron's glass.
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| Number | Title | Issue Date |
| 8008102 | Method of forming light emitting devices comprising semiconducting single walled carbon nanotubes The present invention relates to a new light emitters that exploit the use of semiconducting single walled carbon nanotubes (SWNTs). Experimental evidences are given on how it is possible, within the standard silicon technology, to devise light emitting diodes (LEDs... | 08/30/2011 |
| 8003228 | Highly photoluminescent organic compounds, synthesis thereof, and use thereof in electroluminescent devices New, highly photoluminescent compounds are described having structural formula (I) wherein: R1, R2, R3, R4, independently from each other, represent H; alkyl, alke... | 08/23/2011 |
| 7993796 | Wafer provided with transverse conductors and application to a fuel cell A thin wafer comprising through holes filled at least partially with conductive carbon nanotubes generally oriented transversally to the wafer. A fuel cell comprising, in a thin wafer, a through hole filled with an electrolyte surrounded with barriers of carbon nano... | 08/09/2011 |
| 7976745 | Process for the preparation of a composite polymeric material The present invention relates to a process for the preparation of a composite polymeric material containing nanometric inorganic inclusions comprising the steps of: mixing a polymer with a thermolytic precursor to provide a homogeneous dispersion of said at least on... | 07/12/2011 |
| 7952173 | Nanometric device with a hosting structure of nanometric elements A nanometric device comprising a substrate; a plurality of conductive spacers of a conductive material, each conductive spacer being arranged on top of and transverse to the substrate, the conductive spacers including respective pairs of conductive spacers defining ... | 05/31/2011 |
| 7848801 | Iontophoretic systems, devices, and methods of delivery of active agents to biological interface A transdermal delivery device to passively deliver active agents to a biological interface includes an active agent reservoir comprising a first active agent of a first polarity; an outer active agent membrane taking the form of an ion-exchange membrane of a second ... | 12/07/2010 |
| 7847101 | Pyrazolylbenzothiazole derivatives and their use as therapeutic agents Pharmaceutical pyrazolybenzothiazole compositions of formula (1) are provided. The compositions may be pharmaceutically acceptable salts. R1, R2 and R3 at each occurrence are independently selected from amino, aminosulfinyl, aminosul... | 12/07/2010 |
| 7875728 | Hydrazonopyrazole derivatives and their use as therapeutics Pharmaceutical compositions and compounds are provided. The compounds of the invention demonstrate anti-proliferative activity, and may promote apoptosis in cells lacking normal regulation of cell cycle and death. In one embodiment of the invention, pharmaceutical c... | 01/25/2011 |
| 7875677 | Micellar drug delivery systems for hydrophobic drugs This invention provides compositions comprising a hydrophobic drug, a biocompatible micelle forming polymer, and a biocompatible low molecular weight, water-soluble polymer. Also provided are devices for injection of such compositions and for the use of such composi... | 01/25/2011 |
| 7851915 | Electronic component comprising a titanium carbonitride (TiCN) barrier layer and process of making the same An electronic component comprising several superimposed layers of materials including a TiCN barrier layer. A process for depositing a TiCN layer in order to obtain an electronic component, where a titanium precursor is chosen from among tetrakis(dimethylamido)titan... | 12/14/2010 |
| 7842826 | Process for synthesizing halogenated derivatives of fluorescein for use in the production of non-volatile memory devices A process performs solid phase synthesis of halogenated derivatives of fluorescein, and includes reacting fluorescein with a halide MX, wherein M is an alkali metal and X is a halogen, and Oxone® (2 KHSO5.KHSO4.K2SO4), at... | 11/30/2010 |
| 7799926 | Polar dyes The present invention relates to novel polar fluorescent and quenchers dyes, and minor groove binder with enhanced polarity. The present invention further relates to methods of preparing oligonucleotide probes labeled with polar arsonate dyes under the condition of ... | 09/21/2010 |
| 7485087 | Fistula blocker In order to create a treatment device for clearing up fistulas with which fistulas can be treated as sparingly as possible, and where the functions of the adjacent anatomical structures are to remain as intact as possible, the invention proposes a fistula blocker fo... | 02/03/2009 |
| 7432120 | Method for realizing a hosting structure of nanometric elements Method for manufacturing a hosting structure of nanometric elements comprising the steps of depositing on an upper surface of a substrate, of a first material, a block-seed having at least one side wall. Depositing on at least one portion of sad surface and on the b... | 10/07/2008 |
| 7348257 | Process for manufacturing wafers of semiconductor material by layer transfer A process manufactures a wafer using semiconductor processing techniques. A bonding layer is formed on a top surface of a first wafer; a deep trench is dug in a substrate of semiconductor material belonging to a second wafer. A top layer of semiconductor material is... | 03/25/2008 |
| 7329902 | IR-light emitters based on SWNT's (single walled carbon nanotubes), semiconducting SWNTs-light emitting diodes and lasers The present invention relates to a new light emitters that exploit the use of semiconducting single walled carbon nanotubes (SWNTs). Experimental evidences are given on how it is possible, within the standard silicon technology, to devise light emitting diodes (LEDs... | 02/12/2008 |
| 7303953 | Production of an integrated capacitor A process for producing a capacitor integrated into an electronic circuit comprises the formation of a trench in a substrate through a conductive portion similar to an MOS transistor gate. Alternating conductive, insulating and conductive layers are deposited inside... | 12/04/2007 |
| 7269897 | Manufacturing process of a stacked semiconductor device A manufacturing process of a stacked semiconductor device, comprising the following steps: integrating a plurality of electronic devices in a plurality of active areas realized in a semiconductor wafer; distributing an adhesive layer on active areas, splitting the s... | 09/18/2007 |
| 7259040 | Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby A process for manufacturing a phase change memory array, includes the steps of: forming a plurality of PCM cells, arranged in rows and columns; and forming a plurality of resistive bit lines for connecting PCM cells arranged on a same column, each resistive bit line... | 08/21/2007 |
| 7256130 | Process for defining a chalcogenide material layer, in particular in a process for manufacturing phase change memory cells A process for defining a chalcogenide material layer using a chlorine based plasma and a mask, wherein the portions of the chalcogenide material layer that are not covered by the mask are etched away. In a phase change memory cell having a stack of a chalcogenide ma... | 08/14/2007 |
| 7253108 | Process for forming a thin film of TiSiN, in particular for phase change memory devices The process for forming a film of TiSiN includes the following sequence of steps: deposition of a TiN film at medium temperature, for example, 300-450° C., by thermal decomposition of a metallorganic precursor, for example TDMAT (Tetrakis Dimethylamino Titanium); e... | 08/07/2007 |
| 7247573 | Process for forming tapered trenches in a dielectric material A process for forming a tapered trench in a dielectric material includes the steps of forming a dielectric layer on a semiconductor wafer, and plasma etching the dielectric layer; during the plasma etch, the dielectric layer is chemically and physically etched simul... | 07/24/2007 |
| 7244956 | Self-aligned process for manufacturing a phase change memory cell and phase change memory cell thereby manufactured A process for manufacturing a phase change memory cell, comprising the steps of: forming a resistive element; forming a delimiting structure having an aperture over the resistive element; forming a memory portion of a phase change material in the aperture, the resis... | 07/17/2007 |
| 7141837 | High-density MOS transistor A MOS transistor formed in a silicon substrate comprising an active area surrounded with an insulating wall, a first conductive strip covering a central strip of the active area, one or several second conductive strips placed in the active area right above the first... | 11/28/2006 |
| 7126230 | Semiconductor electronic device and method of manufacturing thereof A semiconductor electronic device is described comprising a die of semiconductor material having a plurality of contact pads electrically connected to a support for example through interposition of contact wires, said plurality of contact pads comprising signal pads... | 10/24/2006 |
| 7126167 | Monolithically integrated resistive structure with power IGBT (insulated gate bipolar transistor) devices A device integrated in a semiconductor substrate of a first type of conductivity being crowned by a semiconductor layer of a second type of conductivity comprising a voltage controlled resistive structure and an IGBT device, wherein the resistive structure comprises... | 10/24/2006 |
| 7091570 | MOS device and a process for manufacturing MOS devices using a dual-polysilicon layer technology with side contact A MOS device has: a semiconductor body defining a surface; a stack on top of the semiconductor body; and a passivation layer on top of the semiconductor body and covering the stack. The stack is formed by a first polysilicon region and by a second polysilicon region... | 08/15/2006 |
| 7067341 | Single electron transistor manufacturing method by electro-migration of metallic nanoclusters A method manufactures a single electron transistor device by electro-migration of nanocluster wherein said nanoclusters are metallically passivated and forced to assembly over a lithographic patterned substrate under control of a non homogeneous electric field at ro... | 06/27/2006 |
| 7064075 | Method for manufacturing semiconductor electronics devices A method is described for manufacturing electronic semiconductor devices comprising the steps of depositing in sequence a layer of hydrophobic material and a “deep UV” photo-resist layer on a semiconductor substrate, selectively removing the “deep UV” photo-... | 06/20/2006 |
| 7023047 | MOS device and process for manufacturing MOS devices using dual-polysilicon layer technology An MOS device has a stack and a passivation layer covering the stack. The stack is formed by a first polysilicon region and by a second polysilicon region arranged on top of one another and separated by an intermediate dielectric region. An electrical connection reg... | 04/04/2006 |
| 7022595 | Method for the selective formation of a silicide on a wafer using an implantation residue layer A method for the selective formation of a suicide on a slice of semiconductor material that comprises exposed regions to be silicided and exposed regions not to be silicided, comprising the following steps: a) forming a resist thin mask on top of the regions not to ... | 04/04/2006 |
| 6974734 | Process for manufacturing a memory device, in particular a phase change memory, including a silicidation step A process wherein an insulating region is formed in a body at least around an array portion of a semiconductor body; a gate electrode of semiconductor material is formed on top of a circuitry portion of the semiconductor body; a first silicide protection mask is for... | 12/13/2005 |
| 6890806 | Semiconductor integrated electronic device and corresponding manufacturing method A method of fabricating a MOS transistor with a controllable and modulatable conduction path through a dielectric gate oxide is disclosed, wherein the transistor structure comprises a dielectric oxide layer formed between two silicon plates, and wherein the silicon ... | 05/10/2005 |
