Did You Know...
...that in 1800 ether was first used by partyers as a fun diversion? Sniffing the gas led to hilarious and raucous laughter as people watched each other become more and more intoxicated and silly. Several doctors independently realized the value ether would have to anesthetize surgery patients. Of those who claimed rights to the "discovery," none had a happy ending. One had a seizure and died defending his rights. Another spent his life in an asylum because he had been denied acclaim. A third became addicted to chloroform and, in a New York City jail, he soaked a cloth in the drug, severed an artery and bled to death.
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| Number | Title | Issue Date |
| 7312943 | Read write (RW) head position control for self servo writing process The present invention provides a method of generating magnetic reference patterns on a disk or other magnetic media. This involves writing a first magnetic reference pattern to the disk with a servo writer. The disk may then be transferred to a hard disk drive. Cont... | 12/25/2007 |
| 7107511 | Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses Low Density Parity Check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses. For the first time, min* processing is demonstrated for use in decoding LDPC-coded signals. In addition, max*, min**, or max** (and their respective inverses... | 09/12/2006 |
| 7093052 | Bus sampling on one edge of a clock signal and driving on another edge An agent may be coupled to receive a clock signal associated with the bus, and may be configured to drive a signal responsive to a first edge (rising or falling) of the clock signal and to sample signals responsive to the second edge. The sampled signals may be eval... | 08/15/2006 |
| 7085985 | Close two constituent trellis of a turbo encoder within the interleave block Close two constituent trellis of a turbo encoder within the interleave block. The state of a multi-state encoder is forced to a known/predetermined state at the end and beginning of each data frame. Packet based and/or frame based data transmissions benefit greatly ... | 08/01/2006 |
| 7079058 | Powering down of DAC and ADC for receive/transmit modes of operation in a wireless device A digital-to-analog converter (DAC) disposed in a data transmission path to convert data from a digital format to an analog format to be transmitted is powered down during a receive mode of operation for a wireless communication device. Likewise, an analog-to-digita... | 07/18/2006 |
| 7079599 | Multi-mode quadrature amplitude modulation receiver for high rate wireless personal area networks A wireless transceiver includes a Radio Frequency (RF) transceiver, a baseband transmitter section, and a baseband receiver section. The baseband receiver section receives a baseband signal from the RF transceiver, extracts data therefrom, and provides the data to a... | 07/18/2006 |
| 7076582 | Bus precharge during a phase of a clock signal to eliminate idle clock cycle A system includes a bus and a circuit for precharging the bus. The circuit may be coupled to receive a clock signal associated with the bus, and may be configured to precharge a bus during an interval of the period of the clock signal, the interval being between a f... | 07/11/2006 |
| 7075280 | Pulse-skipping PFM DC-DC converter using a voltage mode control loop A pulse frequency modulation unit controls upper limit level and lower limit level for an output voltage of a DC-DC converter. A voltage mode control loop uses the upper and lower limit levels in a feedback loop to generate a control signal to enable and disable the... | 07/11/2006 |
| 7076586 | Default bus grant to a bus agent A system may include two or more agents, one of which may be identified as a default agent. If none of the agents arbitrate for the bus, the default agent may be given a default grant of the bus. If the default agent has information to transfer on the bus, the defau... | 07/11/2006 |
| 7072632 | Fast signal detection process A valid signal may be detected by initializing gain settings of the receiver section. The processing then continues by measuring received signal strength of a signal received by the receiver section to produce a 1st received signal strength indication (RS... | 07/04/2006 |
| 7071785 | Use of a thick oxide device as a cascode for a thin oxide transcoductance device in MOSFET technology and its application to a power amplifier design A power amplifier power amplifier includes a transconductance stage and a cascode stage. The transconductance stage that is operable to receive an input voltage signal and to produce an output current signal. The transconductance stage includes a first Metal Oxide S... | 07/04/2006 |
| 7071799 | High performance switch for switched inductor tuned RF circuit A Radio Frequency (RF) circuit includes an active portion and a tuned portion. The active portion receives an RF signal and that operates upon the RF signal. The tuned portion couples to the active portion and includes a first inductor, a second inductor, and an NMO... | 07/04/2006 |
| 7071939 | Unique method for performing zoom-in and zoom-out operations with horizontal and vertical video decimation within a wireless device having a video display A method of presenting a selected portion of graphical images within a wireless terminal that includes receiving an original graphical image, having a source resolution, to be presented on a display screen. The native pixel resolution of the display screen may diffe... | 07/04/2006 |
| 7072391 | Adjustment of transmit power based on an estimated electrical length of a loop To adjust transmit power of a DSL modem, an estimated electrical length of a loop is first determined when a 1st DSL modem at a 1st location transmits a plurality of signals to a 2nd DSL modem at a 2nd location. Each of th... | 07/04/2006 |
| 7073080 | System and method for dynamically regulating voltage in a wireless interface device while maintaining an acceptable bit error rate A method and apparatus for dynamically managing power in a wireless interface device while maintaining an acceptable bit error rate. The wireless interface device includes a wireless interface unit, a bit error detection unit that monitors the bit error rate a data ... | 07/04/2006 |
| 7069498 | Method and apparatus for a web based punch clock/time clock A system and method for building GUI screen screens for a time keeping and expense tracking system includes a time keeping and expense tracking (TKET) server that includes computer instructions that define logic for building GUI screen screens according to user defi... | 06/27/2006 |
| 7065695 | Metric calculation design for variable code rate decoding of broadband trellis, TCM, or TTCM Metric calculation design for variable code rate decoding of broadband trellis, TCM (trellis coded modulated), or TTCM (turbo trellis coded modulation). A single design can accommodate a large number of code rates by multiplexing the appropriate paths within the des... | 06/20/2006 |
| 7062700 | 16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz using a rate 2/4 constituent encoder 16 QAM (Quadrature Amplitude Modulation) and 16 APSK (Asymmetric Phase Shift Keying) TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz (bits per second per Hertz) using a rate 2/4 constituent encoder. Various encoder designs are p... | 06/13/2006 |
| 7058677 | Method and apparatus for selectible quantization in an encoder A method for selectable quantization for use in an encoder for compressing video and/or audio data includes processing that begins by receiving discrete cosine transform data of an encoded signal. The processing continues by obtaining a quantization table. The proce... | 06/06/2006 |
| 7054603 | RF integrated circuit with signal gain adjustment A method and apparatus for signal gain adjustment within an RF integrated circuit (IC) include processing that begins by determining the signal strength of a received RF input signal with respect to a first signal strength scale to produce a signal strength indicati... | 05/30/2006 |
| 7046530 | Method and apparatus for current limiting of an output of a DC-to-DC converter A method for current limiting of an output of a DC-to-DC converter begins by determining a current loading duty cycle of the output of the DC-to-DC converter (i.e., the present duty cycle given the loading of on the output). The processing then continues by comparin... | 05/16/2006 |
| 7047428 | Method and apparatus for performing wake on LAN power management A single integrated circuit includes logic that supports 10BASE-T, 100BASE-T and 1000BASE-T transceiver functionality. The invention implements power management techniques by placing unused functionality in sleep mode. When the functionality is required later, then ... | 05/16/2006 |
| 7042941 | Method and apparatus for controlling amount of quantization processing in an encoder A method and apparatus for controlling the amount of quantization processing used within an encoder that compresses video and/or audio data include processing that begins by receiving discrete cosine transform data of a block of a frame of data. The process then pro... | 05/09/2006 |
| 7039381 | On-chip differential inductor and applications thereof An on-chip differential inductor includes a 1st interwound winding having a substantially octagonal shape, or rectangular octagonal shape, and a 2nd interwound winding having a substantially octagonal shape, or rectangular octagonal shape, that... | 05/02/2006 |
| 7039384 | Low power band-gap current reference A low power supply band-gap current reference includes a 1st P-N junction device, a 2nd and P-N junction device, a 1st current source, a 2nd current source, a 1st resistor, a 2nd resistor, a 3rd ... | 05/02/2006 |
| 7038487 | Multi-function interface A multi-function interface includes a digital interface module and a configurable output impedance module. The digital interface module is operably coupled to pass a first type of input signal when the multi-function interface is in a first mode and operably coupled... | 05/02/2006 |
| 7038516 | Current-controlled CMOS logic family Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic fabricated in conventional CMOS process technology. An entire family of logic elements including inverter/buffers, level shifters, NAND, NOR, X... | 05/02/2006 |
| 7036029 | Conserving power of a system on a chip using speed sensing A method for conserving power begins by measuring processing speed of at least a portion of an integrated circuit (IC) to produce measured processing speed. The portion of the IC may be a test circuit, a critical path of the IC, and/or a replica of the critical path... | 04/25/2006 |
| 7032292 | Method of manufacturing high Q on-chip inductor A high Q on-chip inductor includes a primary winding and an auxiliary winding that is coupled to receive a proportionally opposite representation of an input of the primary winding. Further, the auxiliary winding has an admittance that is greater than the admittance... | 04/25/2006 |
| 7034770 | Printed dipole antenna A printed dipole antenna includes a metal trace having first type sections and second type sections, wherein currents within the first type sections substantially cancel and currents the second type sections are substantially cumulative. ... | 04/25/2006 |
| 7032164 | Efficient design to calculate extrinsic information for soft-in-soft-out (SISO) decoder Efficient design to calculate extrinsic information for Soft-In-Soft-Out (SISO) decoder. A design provides for very efficient performing extrinsic value calculation when performing iterative decoding. The design also accommodates a variety of rate controls each havi... | 04/18/2006 |
| 7030695 | Low threshold voltage circuit employing a high threshold voltage output stage An amplifier circuit uses low threshold voltage devices for mid rail response in low voltage applications, but uses a high threshold voltage device at an output stage of the amplifier to generate an output from the amplifier. ... | 04/18/2006 |
| 7032138 | Generalized convolutional interleaver/de-interleaver A memory-efficient convolutional interleaver/de-interleaver with a memory array, a write commutator, and a read commutator wherein the commutators perform their respective write and read operations relative to a preselected memory cell after a predetermined delay. T... | 04/18/2006 |
| 7028115 | Source triggered transaction blocking A system may include at least a first agent and a second agent, and the first agent may be coupled to receive a block signal generated by the second agent. The block signal is indicative of whether or not the second agent is capable of participating in transactions.... | 04/11/2006 |
| 7024596 | Efficient address generation for interleaver and de-interleaver Efficient address generation for interleaver and de-interleaver. The present invention performs interleaving and de-interleaving, at opposite ends of a communication channel, by employing an efficient address generation scheme that is adaptable across a wide variety... | 04/04/2006 |
| 7020449 | Fast settling variable gain amplifier with DC offset cancellation A variable gain amplifier includes circuit elements that may be partially powered down during transmit modes of operation and that may be powered back up whenever the radio transceiver receives a data packet within a specified settle time even for high throughput RF... | 03/28/2006 |
| 7020210 | Inter-device adaptable interfacing clock skewing Inter-device adaptable interfacing clock skewing. The invention is operable in either one of both of a transmit mode and a receive mode to perform skewing of a transmitted and/or a received signal. The operational parameters including frequency and phase may be dete... | 03/28/2006 |
| 7017106 | Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses Low Density Parity Check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses. For the first time, min* processing is demonstrated for use in decoding LDPC-coded signals. In addition, max*, min**, or max** (and their respective inverses... | 03/21/2006 |
| 7015722 | Current-controlled CMOS circuits with inductive broadbanding Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each ci... | 03/21/2006 |
| 7003615 | Tracking a non-posted writes in a system using a storage location to store a write response indicator when the non-posted write has reached a target device An apparatus includes a storage location and a write monitor circuit coupled to the storage location. The storage location is configured to store a write response indicator which is capable of indicating a reception of at least one write response. Each write respons... | 02/21/2006 |
