Did You Know...
...that two musicians were responsible for the invention of color print film? Fascinated by photography, Leopold Godowsky and Leopold Mannes worked together to produce an easy-to-use, practical color film. They worked full time as music teachers and gave concerts while experimenting during their off hours in Mannes' kitchen. Their success earned them full-time, well-paying jobs at Kodak and their efforts resulted in Kodachrome film, which was introduced in 1935.
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| Number | Title | Issue Date |
| 6530340 | Apparatus for manufacturing planar spin-on films This invention describes improved apparatus and methods for spin-on deposition of semiconductor thin films. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods compr... | 03/11/2003 |
| 6472867 | Target for use in magnetron sputtering of nickel for forming metallization films having consistent uniformity through life Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are included for forming metallization films having effective edge-to-edge deposition uniformity of 5% (3ς) or better. Such targets may b... | 10/29/2002 |
| 6455912 | Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress This invention provides methods for reducing the mechanical stresses within dielectric layers filling the gaps in shallow trench isolation (STI) regions on semiconductor wafers. The methods include the sequential deposition of alternating layers of dielec... | 09/24/2002 |
| 6436207 | Manufacture of target for use in magnetron sputtering of nickel and like magnetic metals for forming metallization films having consistent uniformity through life Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are disclosed for forming metallization films having effective edge-to-edge deposition uniformity of 5% (3ς) or better. Such targets may ... | 08/20/2002 |
| 6418054 | Embedded methodology to program/erase reference cells used in sensing flash cells Programming lines are attached to reference cells of a memory device. A state machine controls voltages and/or currents applied to the reference cells via the programming lines to program and verify a program state of the reference cells. The state machin... | 07/09/2002 |
| 6417041 | Method for fabricating high permitivity dielectric stacks having low buffer oxide Methods of manufacturing insulating materials having high dielectric constants are disclosed, in which the high-dielectric constant material is deposited on a semiconductor surface that has been treated to remove layers of low-dielectric constant dielectr... | 07/09/2002 |
| 6413826 | Gate insulator process for nanometer MOSFETS Methods of manufacturing insulating materials and semiconductor devices incorporating films having high dielectric constants are disclosed, in which the high-dielectric constant material is deposited on a semiconductor surface that has been treated to pre... | 07/02/2002 |
| 6411069 | Continuous capacitor divider sampled regulation scheme A refresh mechanism refreshes a supplied capacitor of a capacitor divider circuit at an interval that keeps an amount of charge degradation at a coupled up capacitor to less than a predetermined threshold. A node between the supplied capacitor and the cou... | 06/25/2002 |
| 6396108 | Self-aligned double gate silicon-on-insulator (SOI) device A self-aligned double gate transistor, comprising: a first silicon portion on an isolation layer, the silicon portion having formed therein a source region and a drain region separated by a channel region, and having a first side and a second side, the fi... | 05/28/2002 |
| 6387825 | Solution flow-in for uniform deposition of spin-on films This invention describes improved apparatus and methods for spin-on deposition of thin films applicable to the manufacture of semiconductor devices. The improved apparatus provides for controlled temperature, pressure and gas compositions within the depos... | 05/14/2002 |
| 6381179 | Using a negative gate erase to increase the cycling endurance of a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure An erase operation is performed on a non-volatile memory cell with an oxide-nitride-oxide structure by using an initial negative gate erase voltage to improve the speed and performance of the non-volatile memory cell after many program-erase cycles. By ut... | 04/30/2002 |
| 6358863 | Oxide/organic polymer multilayer thin films deposited by chemical vapor deposition Multilayer thin films consisting of alternating layers of oxide and organic polymer dielectric materials are manufactured by chemical vapor deposition using a CVD apparatus comprising separate precursor volatilization/dissociation areas. Methods are descr... | 03/19/2002 |
| 6323297 | Low dielectric constant materials with improved thermal and mechanical properties New starting materials and methods are used to make materials with low dielectric constant through the processes of transport polymerization or chemical vapor deposition. The starting materials and precursors are designed to provide polymers with combined... | 11/27/2001 |
| 6319804 | Process to separate the doping of polygate and source drain regions in dual gate field effect transistors The present invention is directed toward a method for independently doping the gate and the source-drain regions of a semiconductor device. The method is initiated by the provision. of a substrate having isolation regions and a thin insulating layer. Over... | 11/20/2001 |
| 6316055 | Near-room temperature thermal chemical vapor deposition of oxide films This invention discloses methods for the deposition of SiO2 and other oxide dielectric materials using a near room temperature thermal chemical vapor deposition process. The films have chemical, physical, optical, and electrical properties simi... | 11/13/2001 |
| 6317642 | Apparatus and methods for uniform scan dispensing of spin-on materials This invention describes improved apparatus and methods for spin-on deposition of semiconductor thin films. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods compr... | 11/13/2001 |
| 6297128 | Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress This invention provides methods for reducing the mechanical stresses within dielectric layers filling the gaps in shallow trench isolation (STI) regions on semiconductor wafers. The methods include the sequential deposition of alternating layers of dielec... | 10/02/2001 |
| 6295572 | Integrated SCSI and ethernet controller on a PCI local bus An integration of components of SCSI and Ethernet adapter boards onto a single chip forming an integrated Ethernet-SCSI controller for use on a PCI Local Bus. Integration is enabled by a reduction of noise. Noise is first reduced by reducing ground bounce... | 09/25/2001 |
| 6291438 | Antiviral anticancer poly-substituted phenyl derivatized oligoribonucleotides and methods for their use In accordance with the present invention, antisense oligonucleotides are provided with enhanced membrane permeability and stability. This is accomplished in accordance with the invention through conjugating oligoribonucleotides with a hydrophobic carrier ... | 09/18/2001 |
| 6258407 | Precursors for making low dielectric constant materials with improved thermal stability Fluorinated chemical precursors, methods of manufacture, polymer thin filmswith low dielectric constants, and integrated circuits comprising primarily of sp2 C--F and some hyperconjugated sp3 C--F bonds are disclosed in this inventio... | 07/10/2001 |
| 6238397 | Spine distraction implant and method A spine distraction implant alleviates pain associated with spinal stenosis and facet arthropathy by expanding the volume in the spine canal and/or neural foramen. The implant provides a spinal extension stop while allowing freedom of spinal flexion.... | 05/29/2001 |
| 6235456 | Graded anti-reflective barrier films for ultra-fine lithography This invention provides methods for manufacturing anti-reflective barrier and/or polish-stop layers on semiconductors. The anti-reflective barrier and/or polish-stop layers permit more accurate photolithography during the manufacture of semiconductor devi... | 05/22/2001 |
| 6235030 | Spine distraction implant A spine distraction implant alleviates pain associated with spinal stenosis and facet arthropathy by expanding the volume in the spine canal and/or neural foramen. The implant provides a spinal extension stop while allowing freedom of spinal flexion.... | 05/22/2001 |
| 6228122 | Net semiconstrained device for total hip replacement stability An apparatus and method for hip replacement stability includes a connector which is adapted to be connected between at least one of an acetabular cup, or a component of an acetabular cup, or the adjacent bone, and at least one of a replacement femur or a ... | 05/08/2001 |
| 6225240 | Rapid acceleration methods for global planarization of spin-on films This invention describes improved apparatus and methods for spin-on deposition of semiconductor thin films. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods compr... | 05/01/2001 |
| 6214014 | Acetabular total hip component alignment system for accurate intraoperative positioning in inclination An alignment system 20 is used for alignment structure for surgical procedures. The alignment system and method can be used in a preferred embodiment to align an acetabular cup implant for purposes of a hip replacement procedure. The alignment system and ... | 04/10/2001 |
| 6211022 | Field leakage by using a thin layer of nitride deposited by chemical vapor deposition A nitride layer is deposited over a field oxide layer used to separate transistors formed in a substrate, the nitride layer serving to decrease transistor current leakage. The nitride layer has a dense lattice, effectively blocking H+ and Na+ penetration ... | 04/03/2001 |
| 6200913 | Cure process for manufacture of low dielectric constant interlevel dielectric layers This invention comprises improvements in the ways in which spin-on dielectric layers are cured. A semiconductor wafer is coated with a precursor for a spin-on dielectric material, and after the solution is thinned and evened, the wafer is placed in a curi... | 03/13/2001 |
| 6193731 | Laparoscopic insertion and deployment device A device for inserting a substantially square sheet of flexible material through a laparoscopic cannula into an abdominal cavity. The device is an elongate, generally cylindrical member having a proximal end and a distal end and a body portion therebetwee... | 02/27/2001 |
| 6190496 | Plasma etch reactor and method for emerging films A plasma etch reactor 20 includes a reactor chamber 22 with a grounded upper electrode 24, a lower electrode 28 which is attached to a high frequency power supply 30 and a low frequency power supply 32, and a peripheral electrode 26 which is located betwe... | 02/20/2001 |
| 6190387 | Spine distraction implant A spine distraction implant alleviates pain associated with spinal stenosis and facet arthropathy by expanding the volume in the spine canal and/or neural foramen. The implant provides a spinal extension stop while allowing freedom of spinal flexion.... | 02/20/2001 |
| 6183471 | Spine distraction implant and method A spine distraction implant alleviates pain associated with spinal stenosis and facet arthropathy by expanding the volume in the spine canal and/or neural foramen. The implant provides a spinal extension stop while allowing freedom of spinal flexion.... | 02/06/2001 |
| 6175266 | Operational amplifier with CMOS transistors made using 2.5 volt process transistors A power converter includes an opamp (FIG. 5) with CMOS transistors made using 2.5 volt process technology which tolerates a maximum gate voltage of 2.7 volts. The opamp is driven by a pin supply voltage (NV3EXT) with a maximum value of 3.6 volts. The conn... | 01/16/2001 |
| 6173674 | Plasma reactor with a deposition shield A reactor 20 includes a shield 50 which prevents the deposition of materials along a line-of-sight path from a wafer 26 toward and onto an electrode 32, or a window 38 which couples an electrode 32 to a reaction chamber of the reactor 20. The shield can b... | 01/16/2001 |
| 6170431 | Plasma reactor with a deposition shield A reactor 20 includes a shield 50 which prevents the deposition of materials along a line-of-sight path from a wafer 26 toward and onto an electrode 32, or a window 38 which couples an electrode 32 to a reaction chamber of the reactor 20. The shield can b... | 01/09/2001 |
| 6172392 | Boron doped silicon capacitor plate A nonvolatile memory device utilizing a program junction region of a p-type impurity and oxide grown thereon. In one aspect, the device comprises a programming structure and a program junction separated from said programming structure by a field oxide reg... | 01/09/2001 |
| 6163175 | High voltage detector to control a power supply voltage pump for a 2.5 volt semiconductor process device A high voltage detector circuit (FIG. 2) maintains a voltage (V2) on a reference line driven by a charge pump by turning the charge pump on with a signal (PUMPON) when the reference line voltage (V2) drops below a reference voltage (... | 12/19/2000 |
| 6163223 | High performance dual mode multiple source/local oscillator module A dual-mode multiple signal source/local oscillator module is capable of operating in either an independent offset mode or a common offset mode. The module includes first and second coarse frequency sources, a first signal generator coupled to the first c... | 12/19/2000 |
| 6153454 | Convex device with selectively doped channel In manufacturing a transistor, a doping mask is formed above a substrate. The doping mask is constructed, so that a first region of the substrate for serving as a source in the transistor and a second region of the substrate for serving as a drain in the ... | 11/28/2000 |
| 6151595 | Methods for interactive visualization of spreading activation using time tubes and disk trees Methods for displaying results of a spreading activation algorithm and for defining an activation input vector for the spreading activation algorithm are disclosed. A planar disk tree is used to represent the generalized graph structure being modeled in a... | 11/21/2000 |
