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| Number | Title | Issue Date |
| 7926314 | Vehicle, securement device and safety port A personal property securement device mountable to a vehicle may comprise a cable housing with a safety port that defines a passage extending from internal to external the housing. A cable may be threaded through the passage with one end fixed to a cable retention k... | 04/19/2011 |
| 7861562 | Vehicle mountable personal property securement device A vehicle mountable personal property securement device includes a plurality of walls that device a housing with an aperture. A real is operably disposed in the housing for spring-biased rotation. A cable is threaded through the aperture of the housing and includes ... | 01/04/2011 |
| 7535844 | Method and apparatus for digital signal communication A communication circuit comprises a plurality of receivers to receive the serial data from multiple lanes of a communication channel. The receivers may convert data received from the lanes from a serial to parallel format. Decoders may identify characters recovered ... | 05/19/2009 |
| 7519747 | Variable latency buffer and method of operation A variable latency elastic buffer comprises a plurality of memory locations in which to hold data. A write and read pointer may point to respective write and read addresses of the plurality of locations in which to write and read data. A controller may hold or incre... | 04/14/2009 |
| 7502815 | True random number generator and method of generating true random numbers A true random number generator may comprise a multi-gigabit transceiver with a transceiver to receive a signal of predetermined source data. Recovery circuitry of the transceiver may be operable to recover data from the received signal. A controller may stress the r... | 03/10/2009 |
| 7380035 | Soft injection rate control for buses or network-on-chip with TDMA capability A programmable logic device, in accordance with an embodiment of the present invention, may comprise a bus and a plurality of programmable masters configurable to interface the bus. A first portion of a memory may include configuration data operable to configure mas... | 05/27/2008 |
| 7363600 | Method of simulating bidirectional signals in a modeling system A method of modeling a design in a high level modeling system that supports unidirectional data flow, may comprise identifying a bus-block to represent a connectivity of a bi-directional bus in an system. The bus-block may be represented in serial relationship with ... | 04/22/2008 |
| 7268581 | FPGA with time-multiplexed interconnect A programmable logic device (PLD) includes a plurality of configurable resources, a programmable interconnect having a plurality of signal lines for providing a number of dedicated signal paths between any of the configurable resources, and a subway routing system h... | 09/11/2007 |
| 7218670 | Method of measuring the performance of a transceiver in a programmable logic device The performance of a serial data transceiver in a programmable logic device may be determined by applying a stress sequence of sequential data to a receiver of the transceiver, comparing the received data to reference data and determining the number of errors. ... | 05/15/2007 |
| 7199608 | Programmable logic device and method of configuration In configuring a programmable logic device, first configurable resources of the programmable logic device may be configured as a boot-strap configurator dependent on data in a first portion of configuration memory. After configuring the first configurable resources,... | 04/03/2007 |
| 7183799 | Physically-enforced time-limited cores and method of operation A programmable logic device may comprise a metric circuit operable to repeatedly perform a function and emit a first signal dependent upon its advancement into the function. A comparator may compare the first signal from the metric circuit to a predetermined referen... | 02/27/2007 |
| 7119570 | Method of measuring performance of a semiconductor device and circuit for the same A test circuit to test rise delay/fall delay performance on a semiconductor device may comprise a latch to latch data at its input responsive to a clock signal. The latch may source an output signal related to the data latched. A buffer chain may be configured to se... | 10/10/2006 |
| 6998298 | Thyristor semiconductor memory device and method of manufacture A thyristor memory device may comprise a capacitor electrode formed over a base region of the thyristor using a replacement gate process. During formation of the thyristor, a base-emitter boundary may be aligned relative to a shoulder of the capacitor electrode. In ... | 02/14/2006 |
| 6932618 | Mezzanine integrated circuit interconnect An interconnect assembly to electrically interconnect one or more integrated circuits to an electronic device may comprise a base package to couple to a circuit board of the electronic device. A terminal mezzanine package may support the integrated circuit(s) above ... | 08/23/2005 |
| 6888176 | Thyrister semiconductor device In a method of processing a semiconductor device, a silicide-blocking layer may be formed over a semiconductor material. After defining the silicide-blocking layer, impurities may be implanted into portions of the semiconductor material as defined by the silicide-bl... | 05/03/2005 |
| 6234877 | Method of chemical mechanical polishing A method of planarizing a substrate employs two separate chemical mechanical polishing (CMP) steps. In the first CMP step, the substrate is polished using a first CMP slurry solution and a polishing pad. A diluting solution is then applied to the polishin... | 05/22/2001 |
| 6218256 | Electrode and capacitor structure for a semiconductor device and associated methods of manufacture An electrode and capacitor structure, and methods of manufacture thereof, are disclosed for a semiconductor device. The capacitor includes a dielectric layer sandwiched between opposing first and second electrically conductive electrodes. At least one of ... | 04/17/2001 |
| 6040245 | IC mechanical planarization process incorporating two slurry compositions for faster material removal times The present invention relates to integrated circuits (ICs) fabrication. Particularly, there is a CMP process which incorporates small quantities of two chemicals. The first chemical is the standard slurry mixtures, like water, aluminum-oxide and hydrogen-... | 03/21/2000 |
| 5994224 | IC mechanical planarization process incorporating two slurry compositions for faster material removal times The present invention relates to integrated circuits (ICs) fabrication. Particularly, there is a cmp process which incorporates small quantities of two chemicals. The first chemical is the standard slurry mixtures, like water, aluminum-oxide and hydrogen-... | 11/30/1999 |
| 5966615 | Method of trench isolation using spacers to form isolation trenches with protected corners A trench for isolating active devices on a semiconductor substrate, formed by creating a trench which has a peripheral edge, and disposing an isolating material in the trench. The isolating material extends over the peripheral edge of the trench, thereby ... | 10/12/1999 |
| 5934980 | Method of chemical mechanical polishing A method of planarizing a substrate employs two separate chemical mechanical polishing (CMP) steps. In the first CMP step, the substrate is polished using a first CMP slurry solution and a polishing pad. A diluting solution is then applied to the polishin... | 08/10/1999 |
| 5909202 | Wire-bonded getter in an evacuated display and method of forming the same A wire serves as a gettering material which is wire-bonded to electrical connections which lead outside of a vacuum sealed package. The wire can be activated to create and maintain a high integrity vacuum environment. The "getter" can be either heat activ... | 06/01/1999 |
| 5899749 | In situ etch process for insulating and conductive materials A method of etching an oxide/poly/oxide sandwich structure in which both oxide layers are anisotropically etched, and the poly layer is also isotropically etched to recess the poly from the edge of the contact walls. The oxide etch can be done using oxide... | 05/04/1999 |
| 5894266 | Method and apparatus for remote monitoring A remote intelligent communications device includes a primary RF communications port and an alternative modem communications port. The remote intelligent communications device receives configuration data for configuring the alternative modem communication... | 04/13/1999 |
| 5733383 | Spacers used to form isolation trenches with improved corners A trench for isolating active devices on a semiconductor substrate, formed by creating a trench which has a peripheral edge, and disposing an isolating material in the trench. The isolating material extends over the peripheral edge of the trench, thereby ... | 03/31/1998 |
| 5700580 | Highly selective nitride spacer etch A method is provided for forming a nitride spacer, in which a layer of oxide is grown superjacent a substrate and the semiconductor features disposed thereon. A layer of nitride is deposited superjacent the oxide layer, and a major horizontal portion of t... | 12/23/1997 |
