Bizarre Patents
Neuroimaging as a Marketing Tool
Neuroimaging as a means for validating whether a stimulus such as advertisement, communication, or product evokes a certain mental response such as emotion, preference, or memory, or to predict the consequences of the stimulus on later behavior such as consumption or purchasing.
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| Number | Title | Issue Date |
| 6625158 | Method and system for enhanced communication involving emulated local area networks Provided are a method and system for achieving enhanced performance in communications between a plurality of emulated networks overlaid onto at least one base network, wherein the communications involve one or more source route bridges. The method and sys... | 09/23/2003 |
| 6415358 | Cache coherency protocol having an imprecise hovering (H) state for instructions and data A cache and method of maintaining cache coherency in a data processing system are described. The data processing system includes a plurality of processors that are each associated with a respective one of a plurality of caches. According to the method, a ... | 07/02/2002 |
| 6332181 | Recovery mechanism for L1 data cache parity errors A method of handling a cache error (such as a parity error), which allows a software recovery, by reporting the error using an unrelated system resource, such as an interrupt service, and particularly a data storage interrupt. The parity error can be repo... | 12/18/2001 |
| 6282239 | Method and apparatus for testing a communications line in a data processing system A method and apparatus for testing a modem line in a data processing system, wherein the data processing system includes a modem having an input for a modem line. The input is tested to determine an electrical connection network is present.... | 08/28/2001 |
| 6266614 | Travel guide A travel guide device includes a GPS receiver for determining a present location. Access to a database of points-of-interest, indexed by GPS location, is provided to permit timely presentation of audio narration or visual display of information relevant t... | 07/24/2001 |
| 6266741 | Method and apparatus to reduce system bus latency on a cache miss with address acknowledgments A method of providing a value to a cache used in a computer system, by transmitting the value from a system memory device to a lower level (e.g., L2) of the cache using a system bus, acknowledging the forwarding of the address from the lower level of the ... | 07/24/2001 |
| 6266761 | Method and system in an information processing system for efficient maintenance of copies of values stored within registers A method and system in an information processing system are disclosed for efficiently maintaining copies of values stored within a plurality of registers. The information processing system includes first circuitry, second circuitry, and a plurality of buf... | 07/24/2001 |
| 6249959 | Method for processing an integrated lead suspension A tool block holds an integrated lead suspension during assembly. The tool block has a number of features for precisely positioning the integrated lead suspension while transducer heads are being mechanically and electrically connected to it. The most cri... | 06/26/2001 |
| 6239812 | Apparatus and method for high speed 2D/3D image transformation and display using a pipelined hardware A specialized hardware engine implementing a pipeline technique allows a host graphic workstation to process and display bit mapped images in real time. This hardware engine is capable to apply a pixel by pixel transformation to a wide variety of images (... | 05/29/2001 |
| 6237030 | Method for extracting hyperlinks from a display document and automatically retrieving and displaying multiple subordinate documents of the display document An improved method for viewing a plurality of network locations in response to a single user input utilizing a computer network. A plurality of network locations are assigned to a predetermined group selectable from a single graphic user interface button.... | 05/22/2001 |
| 6237057 | Method and system for PCI slot expansion via electrical isolation A method of providing an interconnection between one or more peripheral devices and a system bus of a computer system selectively establishes and removes a connection from a primary peripheral bus to a secondary peripheral buses, and determines a target f... | 05/22/2001 |
| 6237103 | Power sequencing in a data processing system A data processing system includes a power control circuit, a processor, a power supply, and a plurality of other components. Upon system reset, the power control circuit can generate at least one sequencing signal indicating a first sequence in which powe... | 05/22/2001 |
| 6236989 | Network-based help architecture A method and system for implementing a network-based help architecture for software applications that reside on a host data processing system. A help database that is designed to support a software application that resides on a data processing system is i... | 05/22/2001 |
| 6232798 | Self-resetting circuit timing correction A system and method with a self-reset circuit for synchronizing an input data path with a timing control path. The self-resetting circuit includes a normal-mode input detect circuit which detects an arrival of data from the input data path into the self-r... | 05/15/2001 |
| 6233142 | Mechanical architecture of supporting a hard disk drive into a feature card slot in a network computer A small network computer has a chassis which is mounted within a housing. A variety of electronic components are mounted to the chassis and a pair of feature card slots are located in a tailstock portion of the chassis. A full-sized 3.5 inch hard disk dri... | 05/15/2001 |
| 6233143 | Shock dampening system for hard disk drive carrier A carrier for a hot-pluggable hard disk drive has a frame with a pair of side walls, a front end, and a rear end. The hard disk drive mounts to the frame within its confines. A connector is provided for electrically coupling the hard disk drive to a compu... | 05/15/2001 |
| 6233642 | Method of wiring a 64-bit rotator to minimize area and maximize performance Each bitslice multiplexing structure of a rotator circuit is configured as a plurality of first stage 8:1 multiplexers each receiving eight of the rotator circuits as inputs and one second-stage 8:1 multiplexer receiving the outputs of the first-stage mul... | 05/15/2001 |
| 6233674 | Method and system for scope-based compression of register and literal encoding in a reduced instruction set computer (RISC) A compression scheme for program executables that run in a reduced instruction set computer (RISC) architecture such as the PowerPC is disclosed. The method and system utilize scope-based compression for increasing the effectiveness of conventional compre... | 05/15/2001 |
| 6230302 | Method and system for performing timing analysis on an integrated circuit design A method and system for performing timing analysis on an integrated circuit design are disclosed. It is always advantageous to be able to conveniently perform a timing analysis on the entire IC design at any stage of the design process in order to gain mo... | 05/08/2001 |
| 6230265 | Method and system for configuring resources in a data processing system utilizing system power control information A data processing system includes a plurality of components, a power control network, processing resources, and a memory that contains initialization firmware. At system startup, the power control network initiates supply of power to the plurality of comp... | 05/08/2001 |
| 6230242 | Store instruction having vertical memory hierarchy control bits A STORE instruction having vertical memory hierarchy control bits is disclosed. The STORE instruction comprises an operation code field, a write-through field, and a vertical write-through level field. The vertical write-through level field indicates a ve... | 05/08/2001 |
| 6230121 | Measurement and validation of interaction and communication A method of monitoring an individual's interactions, by recording a value of an interaction parameter of the individual (such as conversational speech) using a measurement device, storing the value of the interaction parameter with an associated geographi... | 05/08/2001 |
| 6229779 | Physical play-in-place audio compact disc jewel case A physical play-in-place case for housing and playing a media disc, such as an audio compact disc (CD). The case comprises a base, a shell attached to the base defining a cavity for receiving a CD, the shell further having a landing portion defining a spi... | 05/08/2001 |
| 6229708 | Multi-axis microprocess or docking mechanism A mechanism has a subassembly that contains a microprocessor. The mechanism allows the microprocessor to be easily installed through frontal or rear access into a rack drawer and subsequently docked into a receiving assembly. The docking mechanism is mult... | 05/08/2001 |
| 6229699 | Packaging apparatus and method for networks computer chassis A network computer has a chassis with four wall-like frame members located at its rectangular perimeter. A motherboard having a variety of electronic components is mounted to the chassis within the rectangular perimeter. The chassis is mounted within a me... | 05/08/2001 |
| 6229693 | Articulated display for notebook computer A notebook computer has a base, a lid and a display monitor located within the lid. The lid also contains a device which may be used to articulate and support the display in various positions away from the lid that improve viewing for the user under limit... | 05/08/2001 |
| 6229676 | Ferrofluid seal for actuator bearing A ferrofluid seal for a hard disk drive actuator bearing has two circular plates which are axially spaced apart about a nonmagnetic pivot shaft of the actuator. The plates are parallel and in close proximity to one another. The upper plate is made of magn... | 05/08/2001 |
| 6229358 | Delayed matching signal generator and frequency multiplier using scaled delay networks A delayed matching signal generator and frequency multiplier using scaled delay networks for providing precisely delayed matching signals and multiplied frequency signals is provided. The system and method of phase shifting a periodic input digital signal... | 05/08/2001 |
| 6227516 | Quick-release mechanism for hard disk drive A mounting tray for a hard disk drive has a base, a front wall, and a pair of side walls. A pair of latching mechanisms are located in each side wall. Each latching mechanism has a slide and a spring-like fastener. The fasteners have an unlocked position ... | 05/08/2001 |
| 6227042 | Glide head with low sensitivity A glide head for burnishing or smoothing the surface of a magnetic disk has an air bearing on one side and a piezoelectric element on an opposite side. The air bearing comprises a patterned set of four or five air bearing surfaces (ABS) and etched pockets... | 05/08/2001 |
| 6224395 | Flex cables with increased three-dimensional conformity and design flexibility A flex cable is slit between conductor traces to provide conformable strips, at least one of which can be flipped to expose one of the conductor traces to the other side of the cable. This increases the design flexibility of the flex cable because the con... | 05/01/2001 |
| 6226562 | Method and system for adjusting and calibrating circuit parameters A method and system for calibrating analog integrated circuits. Initially, a single calibration circuit is formed integral with a group of analog integrated circuits. A control signal and a calibration signal are generated from the calibration circuit. Ne... | 05/01/2001 |
| 6226690 | Method and apparatus for utilizing proxy objects to communicate with target objects A method for a first process in a first address space to communicate with an object in a second address space including the steps of determining, during runtime of the first process, that a communication link is needed between the first process and a targ... | 05/01/2001 |
| 6226691 | System, method, and article of manufacture for adding object services to a binary class in an object oriented server A system, method and article of manufacture for automatically inserting object services such as persistence, concurrency, recoverability, security and distribution into binary classes in an information handling system employing object oriented technology,... | 05/01/2001 |
| 6226761 | Post dump garbage collection The operating system or memory management mechanism for a lean client or network computer, or any other data processing system, employs a garbage collection memory management model in which live references to an object are periodically surveyed and discon... | 05/01/2001 |
| 6226720 | Method for optimally configuring memory in a mixed interleave system Memory bank pairs are sorted utilizing variables determined by a scoring criteria. The scores for the variables are based on the number of memory blocks in a memory bank that are filled; the total number of memory bank pairs that are identically populated... | 05/01/2001 |
| 6226718 | Method and system for avoiding livelocks due to stale exclusive/modified directory entries within a non-uniform access system A method for avoiding livelocks due to stale exclusive/modified directory entries within a non-uniform memory access (NUMA) computer system is disclosed. A NUMA computer system includes at least two nodes coupled to an interconnect. Each of the two nodes ... | 05/01/2001 |
| 6223252 | Hot spare light weight mirror for raid system A hot spare drive within a disk array mirrors writes to a selected drive within the disk array. The mirror is light weight in that little effect on system performance is seen, since both writes need not be complete before the write is returned as successf... | 04/24/2001 |
| 6223201 | Data processing system and method of task management within a self-managing application A data processing system and method of task management within a self-managing application program including a number of tasks and a processing time monitor are disclosed. In accordance with the present invention, a selected portion of processing time is a... | 04/24/2001 |
| 6223142 | Method and system for incrementally compiling instrumentation into a simulation model A method and system are disclosed that utilize the expressiveness of hardware description languages for incrementally compiling instrumentation logic into a simulation model of a digital circuit design. According to the present invention, a simulation mod... | 04/24/2001 |
