Bizarre Patents
A method of swing on a swing is disclosed, in which a user positioned on a standard swing suspended by two chains from a substantially horizontal tree branch induces side to side motion by pulling alternately on one chain and then the other.
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| Number | Title | Issue Date |
| 5774727 | Parallel processing system for virtual processor implementation of machine-language instructions A language construct that allows a software programmer to use an intermediate or high-level language command to explicitly group operations or fuse loops in a group of statements operating on parallel arrays is disclosed. The command instructs a compiler,... | 06/30/1998 |
| 5648911 | Method of minimizing area for fanout chains in high-speed networks The method for efficiently providing an optimized fanout network includes the steps of providing a series chain of inverters for driving a number of loads. Each load is assigned to a given location of the inverter chain according to the polarity and the r... | 07/15/1997 |
| 5634023 | Software mechanism for accurately handling exceptions generated by speculatively scheduled instructions Methods for handling exceptions caused by speculatively scheduled instructions or predicated instructions executed within a computer program are described. The method for speculatively scheduled instructions includes checking at a commit point of a specul... | 05/27/1997 |
| 5627981 | Software mechanism for accurately handling exceptions generated by instructions scheduled speculatively due to branch elimination Methods for handling exceptions caused by speculatively scheduled instructions or predicated instructions executed within a computer program are described. The method for speculatively scheduled instructions includes checking at a commit point of a specul... | 05/06/1997 |
| 5581719 | Multiple block line prediction A pipelined processor includes an instruction box including a register mapper, to map register operand fields of a set of instructions and an instruction scheduler, fed by said set of instructions, to reorder the issuance of said set of instructions from ... | 12/03/1996 |
| 5581691 | Work flow management system and method A work flow description database represents long running work flows as a set of work units, called steps, with information flows therebetween. The description database defines each step's input and output signals, input condition criteria for creating an ... | 12/03/1996 |
| 5564118 | Past-history filtered branch prediction A pipelined processor includes an instruction box including a register mapper, to map register operand fields of a set of instructions and an instruction scheduler, fed by said set of instructions, to reorder the issuance of said set of instructions from ... | 10/08/1996 |
| 5533195 | Testing tool for diagnosing defective computer system devices A flexible software testing tool provides fast and efficient diagnosis of defective computer system devices. The software testing tool includes an action string command qualifier that enables dynamic exercising of target computer devices by specifying cer... | 07/02/1996 |
| 5528605 | Delayed acknowledgement in an asymmetric timer based LAN communications protocol A computer communications system has a controller for controlling a master with a circuit timer, the circuit timer is capable of aggregating data produced during a circuit timer interval into a single master message, and the data is produced by a pluralit... | 06/18/1996 |
| 5488730 | Register conflict scoreboard in pipelined computer using pipelined reference counts A data dependency scoreboard for a pipelined digital computer includes a source counter and a destination counter for each general purpose register (GPR). The source counter for each GPR is incremented each time that a specifier is decoded that specifies ... | 01/30/1996 |
| 5450349 | Computer system performance evaluation system and method A system for evaluating the performance of a computer system having a processor that passes through a plurality of processor states during operation and an associated system memory includes an operating unit for receiving a request to monitor specific pro... | 09/12/1995 |
| 5436800 | Zero impact module ejection system A circuit board is ejected from an electrical chassis by inserting a pair of implements into corresponding pairs of apertures disposed on opposing side members of the electrical chassis. The end portions of the implements are engaged in a first pair of no... | 07/25/1995 |
