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| Number | Title | Issue Date |
| 5580251 | Electronic refreshable tactile display for Braille text and graphics This is a Braille display device which comprises: a plurality of cavities; and circuitry to individually excite the plurality of cavities. The plurality of cavities contain a positive and a negative electrode 18, 22, 26 and are filled with a quantity of p... | 12/03/1996 |
| 5565682 | Electrical contact to the common electrode of an infrared detector array A system for infrared sensing has thermally sensitive picture elements within a substrate; bias contact areas within the substrate and around a periphery of the thermally sensitive picture elements; a common electrode on a front side of the thermally sens... | 10/15/1996 |
| 5552326 | Method for forming electrical contact to the optical coating of an infrared detector using conductive epoxy This is a system and method of forming an electrical contact to the optical coating of an infrared detector using conductive epoxy. The method may comprise: forming thermal isolation trenches 22 and bias contact vias 23 in a substrate 20; depositing a tre... | 09/03/1996 |
| 5548159 | Porous insulator for line-to-line capacitance reduction An interconnect structure and method is described herein. First, interconnect lines 14a-d are formed on a semiconductor body 10. Then, a dielectric layer 20 is coated over the semiconductor body and the interconnect lines 14a-d to a thickness sufficient t... | 08/20/1996 |
| 5546312 | Use of spatial models for simultaneous control of various non-uniformity metrics A method and system have been described for simultaneously controlling one or multiple metrics of non-uniformity using a model form independent multi-variable controller. The method comprising: utilizing process models relating a plurality of product qual... | 08/13/1996 |
| 5532484 | Defective pixel signal substitution in thermal imaging systems Thermal imaging system (10) includes a focal plane array (18) having pixels (20). Signals produced by pixels (20) are addressed by integrated circuit substrate (22) and passed to video processor (24). Video processor (24) includes, among other modules, a ... | 07/02/1996 |
| 5527737 | Selective formation of low-density, low-dielectric-constant insulators in narrow gaps for line-to-line capacitance reduction An interconnect structure and method is described herein. First, interconnect lines 14a-d are formed on a semiconductor body 10. Then, a dielectric layer 20 is coated over the semiconductor body and the interconnect lines 14a-d to a thickness sufficient t... | 06/18/1996 |
| 5521104 | Method for dry etching of post-processing interconnection metal on hybrid integrated circuits This is a system and method of fabricating hybrid integrated circuits (IC). The method may comprise: forming internal IC structures on a substrate; forming IC interlevel insulation on top of the internal IC structures; forming IC top level metal connectio... | 05/28/1996 |
| 5520299 | Etching pyroelectric devices post ion milling This is a system and method of etching pyroelectric devices post ion milling. The method may comprise: forming a mask 32 for thermal isolation trenches on a substrate 14; ion milling thermal isolation trenches 40 in the substrate 14; and etching undesired... | 05/28/1996 |
| 5512764 | Coupled-quantum-well field-effect resonant tunneling transistor for multi-valued logic/memory applications This is a vertical field-effect resonant tunneling transistor device comprising: a semi-conducting substrate 46; a drain region 48 above the semi-conducting substrate; a multiple-barrier multi-well resonant tunneling diode 52, 54, 56, 58, 60 above the dra... | 04/30/1996 |
| 5468662 | Method of making thin film transistor and a silicide local interconnect A method of fabricating a transistor on a wafer including: forming a doped transistor body 42 on top of an insulator 34; doping source/drain regions in the transistor body; forming a gate oxide 44 on top of the transistor body; forming sidewall spacers al... | 11/21/1995 |
| 5468561 | Etching and patterning an amorphous copolymer made from tetrafluoroethylene and 2,2-bis(trifluoromethyl)-4,5-difluoro-1,3-dioxole (TFE AF) This is a device and method of forming such, wherein the device has an amorphous "TEFLON" (TFE AF) layer. The device comprising: a substrate; a TFE AF 44 layer on top of the substrate; and a semiconductor layer 42 on top of the TFE AF 44 layer. The device... | 11/21/1995 |
| 5457786 | Serial data interface with circular buffer An interface for receiving and transmitting serial data from and to a communications bus and for permitting access to the data by a processor, after the data has been converted to parallel form. The interface makes use of two random access memories. A rea... | 10/10/1995 |
| 5451530 | Method for forming integrated circuits having buried doped regions A method for fabricating an integrated circuit having a buried doped region is disclosed. A thermal oxide layer is formed over a portion of a p-type substrate at which an n+ buried doped region is not to be formed, masking the implant for the buried doped... | 09/19/1995 |
| 5437027 | System and method for database management supporting object-oriented programming A system and method for database management for providing support for long-term storage and retrieval of objects created by application programs written at least in part in object-oriented programming languages consists of a plurality of software modules.... | 07/25/1995 |
| 5424964 | Method and system for optimizing a transistor model A modeling system 10 comprises a central processing unit 12 coupled to an arithmetic logic unit 16. A device testing system 18 is used to empirically analyze the operational characteristics of a transistor to be modeled by the system 10. A set of paramete... | 06/13/1995 |
| 5407860 | Method of forming air gap dielectric spaces between semiconductor leads This is a device and method of forming air gaps in between metal leads comprising. The method comprising: forming the metal leads 51-53 on an insulating layer 50; depositing a nonwetting material layer 56 on the metal leads 51-53 and the insulating layer ... | 04/18/1995 |
| 5407837 | Method of making a thin film transistor This is a method of fabricating a transistor on a wafer. The method comprises: forming a doped silicon layer; patterning the active transistor regions of the doped silicon layer and utilizing a silicon etch to remove the non-transistor regions of the dope... | 04/18/1995 |
| 5408405 | Multi-variable statistical process controller for discrete manufacturing A method and system for controlling a plurality of process control variables for processing discrete products is described. The method comprising: utilizing process models relating a plurality of product quality parameters to the plurality of process cont... | 04/18/1995 |
| 5403759 | Method of making thin film transistor and a silicide local interconnect A method of fabricating a transistor on a wafer including; forming a doped transistor body 42 on top of an insulator 34; doping source/drain regions in the transistor body; forming a gate oxide 44 on top of the transistor body; forming sidewall spacers al... | 04/04/1995 |
| 5403437 | Fluorosurfactant in photoresist for amorphous "Teflon" patterning This is a device and method of forming such, wherein the device has an amorphous "TEFLON" (TFE AF) layer. The method comprising: depositing an TFE AF layer 36 on a substrate; combining a fluorosurfactant with a first material to produce a second material ... | 04/04/1995 |
