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| Number | Title | Issue Date |
| 6940170 | Techniques for triple and quadruple damascene fabrication The present invention provides integrated circuit fabrication methods and devices wherein triple damascene structures are formed in five consecutive dielectric layers (312, 314, 316, 318 and 320), using two etching sequences. A first etching sequence c... | 09/06/2005 |
| 6762127 | Etch process for dielectric materials comprising oxidized organo silane materials The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressur... | 07/13/2004 |
| 6685803 | Plasma treatment of processing gases The present invention provides a DBD cell (500) including ring shaped electrodes (512 and 514) that are positioned side-by-side on a dielectric tube (516). An AC power supply (518) is provided such that the cell and the power supply form a DBD treatment d... | 02/03/2004 |
| 6606765 | Coiled tie-down devices The present invention provides tie-down devices and techniques for securing an object to a structure. The tie-down devices are formed using helix shaped elongate members including multiple coils having substantially the same dimensions and configuration. ... | 08/19/2003 |
| 6594540 | Misalignment tolerant techniques for dual damascene fabrication The present invention provides integrated circuit fabrication methods and devices wherein dual damascene structures are formed which compensate for misalignment between the via pattern and the trench pattern by widening the trench at the point where the m... | 07/15/2003 |
| 6583509 | Semiconductor processing techniques The present invention provides a manufacturing environment (110) for a wafer fab, and an SPC environment (112) for setting control limits and acquiring metrology data of production runs. A computation environment (114) processes the SPC data, which are th... | 06/24/2003 |
| 6556949 | Semiconductor processing techniques The present invention provides a manufacturing environment (210) for a wafer fab, and an SPDA data environment (212) for acquiring processing parameters and metrology data of production runs. A computation environment (214) processes the SPDA data to prep... | 04/29/2003 |
| 6530180 | Framing layout template The present invention provides devices for positioning frame members for fabricating a wood frame. Each device includes an elongated flexible member and wood blocks that are removably attached to the flexible member. The length of the wood blocks equals t... | 03/11/2003 |
| 6514671 | Interconnect line formed by dual damascene using dielectric layers having dissimilar etching characteristics The present invention provides integrated circuit fabrication methods and devices wherein dual damascene structures (332 and 334) are formed in consecutive dielectric layers (314 and 316) having dissimilar etching characteristics. The present invention al... | 02/04/2003 |
| 6408220 | Semiconductor processing techniques The present invention provides a manufacturing environment (110) for a wafer fab, and an SPC environment (112) for setting control limits and acquiring metrology data of production runs. A computation environment (114) processes the SPC data, which are th... | 06/18/2002 |
| 6223540 | Gas processing techniques The present invention provides techniques for processing effluent gases from vacuum fabrication processes. The effluent gases are condensed on cold surfaces (512 and 514) inside a novel pump (220) resulting in a high vacuum. The pump (220) can be connecte... | 05/01/2001 |
| 6225207 | Techniques for triple and quadruple damascene fabrication The present invention provides integrated circuit fabrication methods and devices wherein triple damascene structures are formed in five consecutive dielectric layers (312, 314, 316, 318 and 320), using two etching sequences. A first etching sequence comp... | 05/01/2001 |
| 6127263 | Misalignment tolerant techniques for dual damascene fabrication The present invention provides integrated circuit fabrication methods and devices wherein dual damascene structures are formed which compensate for misalignment between the via pattern and the trench pattern by widening the trench at the point where the m... | 10/03/2000 |
| 5831525 | Filtered air, temperature controlled removable computer cartridge devices 058315250 The present invention provides for removable cartridge devices including removable cartridges having fan assisted cooling for housing data storage devices and brackets adapted for removably mounting the cartridges. Various features of these cart... | 11/03/1998 |
| 5490707 | Exterior automobile sunshield The present invention provides for automobile sunshields covering the roof and window areas. The sunshield has small apertures to release wind pressure from the inside of the sunshield. The sunshield is fastened onto the automobile body with suction cups.... | 02/13/1996 |
