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| Number | Title | Issue Date |
| 6544483 | Adsorbent gas scrubber to dispose the gas generated during the semiconductor manufacturing process An adsorbent gas scrubber is provided in which the processing efficiency of the gas generated during semiconductor manufacturing can be increased, as the idle time of the system is reduced. The above mentioned object and other objects are accomplished by ... | 04/08/2003 |
| 6534805 | SRAM cell design An embodiment of a memory cell includes a series of four substantially oblong parallel active regions, arranged side-by-side such that the inner active regions of the series include source/drain regions for p-channel transistors, and the outer active regi... | 03/18/2003 |
| 6534378 | Method for forming an integrated circuit device The present invention advantageously provides a method for retaining a substantially transparent dielectric above alignment marks during polishing of the dielectric to ensure that the alignment marks are preserved for subsequent processing steps. Accordin... | 03/18/2003 |
| 6531364 | Advanced fabrication technique to form ultra thin gate dielectric using a sacrificial polysilicon seed layer A method is presented for forming a transistor wherein polysilicon is preferably deposited upon a dielectric-covered substrate to form a sacrificial polysilicon layer. The sacrificial polysilicon layer may then be reduced to a desired thickness. Thickness... | 03/11/2003 |
| 6522277 | Circuit, system and method for performing dynamic element matching using bi-directional rotation within a data converter A circuit, system, and method are provided for imparting improved randomness into the selection of components or elements of a data converter, such as a D/A converter. The elements are intended to be of equal value, however, regardless of whether they are... | 02/18/2003 |
| 6522776 | Method for automated determination of reticle tilt in a lithographic system A method, system, and storage medium for determining retide tilt in a lithographic system is provided. Test patterns contained on a reticle are printed in a photoresist located on an upper surface of a semiconductor substrate by a lithographic system. The... | 02/18/2003 |
| 6522938 | System for tracking quartzware utilization in semiconductor fabrication A system and storage medium for tracking quartzware utilization in vertical furnaces is provided. The system includes a computer server and a plurality of computer systems. The computer server maintains a database of quartzware inventory data and furnace ... | 02/18/2003 |
| 6515287 | Sectored magnetic lens and method of use A magnetic lens configured to apply a magnetic field to a charged particle beam is provided. The magnetic lens may include an outer pole piece and an inner pole piece. The outer pole piece may have at least two sectors and at least two slots. The magnetic... | 02/04/2003 |
| 6515632 | Multiply-fed loop antenna An antenna includes a conductive loop with multiple feed points spaced around the loop. The loop may be opened at each feed point, thereby forming multiple loop portions. In an embodiment, the antenna may be a shielded loop antenna having multiple shielde... | 02/04/2003 |
| 6510522 | Apparatus and method for providing access security to a device coupled upon a two-wire bidirectional bus A computer system, bus interface unit, and method are provided for securing certain devices connected to an I2 C bus. Those devices include any device which contains sensitive information or passwords. For example, a device controlled by a I | 01/21/2003 |
| 6509270 | Method for polishing a semiconductor topography A method is provided for processing a semiconductor topography. In particular a method is provided in which a greater pressure may be applied to a first portion of a semiconductor topography than in a second portion of the topography. As such, a method is... | 01/21/2003 |
| 6507044 | Position-selective and material-selective silicon etching to form measurement structures for semiconductor fabrication A method for position-selective and material-selective etching of silicon, and examination structures formed using the method, are presented. A semiconductor topography is exposed to an electron beam in the presence of xenon difluoride (XeF2) g... | 01/14/2003 |
| 6494100 | Circuit and apparatus for verifying a chamber seal, and method of depositing a material onto a substrate using the same An improved door closure indicator is provided. The indicator operates on pressure levels read within a pressurized chamber rather than from proximity switches coupled between the chamber and the door. If the door seals to the chamber, pressure within the... | 12/17/2002 |
| 6492710 | Substrate isolated transistor A device and a method are provided for isolating a circuit well from a substrate of the same conductivity type. In particular, an integrated circuit is provided which includes a circuit well arranged over a semiconductor substrate with no layer of opposit... | 12/10/2002 |
| 6487621 | Architecture, system and method for ensuring an ordered transaction on at least one of a plurality of multi-processor buses that experience a hit-to-modified snoop cycle An architecture, system and method are provided for efficiently transferring data across multiple processor buses. Cache coherency is maintained among cache storage locations within one or more of those processors, even in instances where a hit-to-modifie... | 11/26/2002 |
| 6480406 | Content addressable memory cell Architecture, circuitry, and methods are provided for producing a content addressable memory (CAM). The CAM includes one or more CAM cells arranged in an array. Each CAM cell is symmetrical about its x- and y-axis to form rows and columns of the array. Ad... | 11/12/2002 |
| 6462817 | Method of monitoring ion implants by examination of an overlying masking material A process control method to monitor ion implantation process conditions by measuring the optical properties of a masking material is provided. A patterned masking material may protect underlying regions of a semiconductor substrate from undergoing a chemi... | 10/08/2002 |
| 6460139 | Apparatus and method for programmably and flexibly assigning passwords to unlock devices of a computer system intended to remain secure A computer system, bus interface unit, and method is provided for programmably modifying securable resources of the computer. Those resources may be devices which can be coupled to peripheral buses of the computer, or which may contain or allow access to ... | 10/01/2002 |
| 6459949 | System and method for corrective action tracking in semiconductor processing A system and method for recording and addressing out of control (OOC) events in a semiconductor processing line. The method includes steps of (a) opening OOC entries in an OOC database, and (b) working the OOC entries. Opening an OOC entry is performed in... | 10/01/2002 |
| 6455427 | Method for forming void-free metallization in an integrated circuit A metallization structure and method for fabricating such a metallization structure are presented. The present method preferably includes forming a void within a metal layer. The void may have a void pressure level, which is preferably approximately equal... | 09/24/2002 |
| 6452412 | Drop-in test structure and methodology for characterizing an integrated circuit process flow and topography A drop-in test structure fabricated upon a production integrated circuit elevational profile and a method for using the drop-in test structure for characterizing an integrated circuit production methodology are described. The test structure may be fabrica... | 09/17/2002 |
| 6451657 | Transistor with an ultra short channel length defined by a laterally diffused nitrogen implant A process is disclosed for fabricating a transistor having a channel length that is smaller than lengths resolvable using common photolithography techniques. A gate oxide layer is formed over a lightly doped semiconductor substrate. A gate conductor layer... | 09/17/2002 |
| 6446739 | Rock drill bit with neck protection A rotary drill bit for boring a bore hole in an earthen formation includes a bit body having a pin end, a cutting end and a longitudinal axis and including at least two legs extending from the cutting end. Each of the legs includes a leading side surface,... | 09/10/2002 |
| 6444564 | Method and product for improved use of low k dielectric material among integrated circuit interconnect structures A method is presented for forming a liner upon spaced interconnect structures arranged upon a semiconductor topography. An oxide layer may be deposited to form the liner. The spaced interconnect structures may each include an interlevel dielectric portion... | 09/03/2002 |
| 6446022 | Wafer fabrication system providing measurement data screening A wafer fabrication system is presented including a measurement system which screens measurement data prior to dissemination. The measurement system may include an equipment interface computer coupled between a measurement tool and a work-in-process (WIP)... | 09/03/2002 |
| 6442727 | Method, circuit and apparatus for preserving and/or correcting product engineering information A method, circuit and apparatus is provided for preserving and/or correcting product engineering information. Non-volatile storage devices reserved for receiving product engineering bits can either be contained in at least three separate storage locations... | 08/27/2002 |
| 6437710 | Encoder within a communication system that avoids encoded DC accumulation and can use coding violations to synchronize a decoder and detect transmission errors A communication system is provided for interconnecting a network of digital systems. Each node of the communication system may include a transceiver and an encoder/decoder. The encoder codes an incoming data stream and forwards the encoded data stream acr... | 08/20/2002 |
| 6434217 | System and method for analyzing layers using x-ray transmission A system and method are presented for determining the thickness and elemental composition of a layer within a measurement sample in an easy and inexpensive manner. An embodiment of the method includes impinging an incident x-ray beam into an exposed surfa... | 08/13/2002 |
| 6429452 | Test structure and methodology for characterizing ion implantation in an integrated circuit fabrication process A test structure for characterizing ion implantation procedures used in integrated circuit fabrication processes and a method for using the test structure are described. The test structure includes a first dielectric layer, a patterned polysilicon layer, ... | 08/06/2002 |
| 6430456 | Efficient process tool utilization in semiconductor manufacturing using an additional process tool state A method, system, and storage medium for increasing the efficiency of integrated circuit (IC) manufacture by improvements in manufacturing equipment usage are provided. Process tools are assigned to one of three operating states: up, down, or conditional.... | 08/06/2002 |
| 6429783 | Apparatus for indicating operational status of semiconductor fabrication equipment An apparatus and method for indicating the operational status of equipment ("tools") used in semiconductor fabrication is provided. In one embodiment, the operational status of a tool is indicated by a mechanical sign attached to the tool. The sign contai... | 08/06/2002 |
| 6429671 | Electrical test probe card having a removable probe head assembly with alignment features and a method for aligning the probe head assembly to the probe card An electrical test probe card is presented including a removable probe head assembly with alignment features, as well as a method for aligning the probe head assembly to the probe card. The probe head assembly is used to provide an electrical interface be... | 08/06/2002 |
| 6430718 | Architecture, circuitry and method for testing one or more integrated circuits and/or receiving test information therefrom Architecture, circuitry, and methods are provided for testing one or more integrated circuits which may be arranged upon a printed circuit board. The integrated circuits include sequential and combinatorial logic used by the integrated circuit during norm... | 08/06/2002 |
| 6421287 | Method for controlling experimental inventory A method is provided for programming and reading manufacturing information upon non-volatile storage elements of the integrated circuit. The manufacturing information includes the particular processing recipe and layout of the integrated circuit, each rec... | 07/16/2002 |
| 6421113 | Photolithography system including a SMIF pod and reticle library cassette designed for ESD protection A lithography system including a reticle carrier and reticle library cassette designed for electro-static discharge (ESD) protection. A reticle carrier, such as a SMIF (Standard Mechanical Interface) pod, and reticle library cassette are fabricated largel... | 07/16/2002 |
| 6420730 | Elevated transistor fabrication technique A second transistor is formed a spaced distance above a first transistor. An interlevel dielectric is first deposited upon the upper surface of the first semiconductor substrate and the first transistor. A second semiconductor substrate, preferably compri... | 07/16/2002 |
| 6409940 | Nickel-rhodium based catalysts and process for preparing synthesis gas A process of preparing a product gas mixture comprising CO and H2 from a light hydrocarbon and O2 mixture is disclosed. The process includes contacting a reactant gas mixture comprising a C1 -C5 hydrocarbon and ... | 06/25/2002 |
| 6408394 | System and method for applying initialization power to SCSI devices A computer is provided having a SCSI subsystem and multiple SCSI devices connected to that subsystem. Those devices involve electromechanical motors which require a greater amount of current during times needed to spin-up the motor-driven devices to a ste... | 06/18/2002 |
| 6402989 | Catalytic partial oxidation process and promoted nickel based catalysts supported on magnesium oxide A process and catalyst are disclosed for the catalytic partial oxidation of light hydrocarbons to produce synthesis gas. The process involves contacting a feed stream comprising the hydrocarbon feedstock and an oxygen-containing gas with a catalyst in a r... | 06/11/2002 |
| 6388927 | Direct bit line-bit line defect detection test mode for SRAM A system and method are disclosed herein for leakage testing of a static random access memory (SRAM) semiconductor memory device. Subtle leakage defects may be present in some devices in the early stages of SRAM production. These defects may later result ... | 05/14/2002 |
