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| Number | Title | Issue Date |
| 4864629 | Image correlation system A method and apparatus for controlling a parallel combination of correlation circuits which compare image pixels. A number of correlation circuits are provided, each having its own memory. The memories are loaded with image data with each memory being ass... | 09/05/1989 |
| 4856770 | Pressure wheel device for moving a print medium in a plotter or printer Two pressure wheels are mounted on respective support parts and are pressed against respective edges of print medium by a common force-applying device such as a cable acting substantially equally on two mechanical devices on which the pressure wheels are ... | 08/15/1989 |
| 4855624 | Low-power bipolar-CMOS interface circuit A biCMOS interface circuit receives a plurality of incoming signals at a first level and supplies a plurality of output signals at a second level. The interface circuit establishes control voltages which are used to maintain an identical trip point in eac... | 08/08/1989 |
| 4849702 | Test period generator for automatic test equipment A timing subsystem 10 including several test period generators for supplying a variety of timing signals to a device under test. Major, minor, and free-run period generators each supply various timing signals to a multiplexer 18, which selectively connect... | 07/18/1989 |
| 4843383 | Transistor matrix shifter An expandable ECL matrix shifter is provided to have very few interconnecting wires. The shifter can perform a multicolumn right shift or a multicolumn left shift in one cycle, and it has independent wrap and fill capabilities. Two 2 to 1 multiplexers are... | 06/27/1989 |
| 4841471 | System for converting analog signals to a discrete representation without aliasing A network of filter elements for transforming an analog signal of infinite bandwidth into a discrete filter space representation having a bandwidth equal to π. In one embodiment the filter network includes Laguerre filter elements. Other embodiments incl... | 06/20/1989 |
| 4839311 | Etch back detection An improved method for the etch-back planarization of interlevel dielectric layers provides for cessation of the etch-back upon exposure of an indicator layer. the indicator layer, usually a metal, metal nitride, or silicon nitride is formed either within... | 06/13/1989 |
| 4837521 | Delay line control system for automatic test equipment A system is disclosed which enables signals to be supplied at precisely desired times in an automatic test system. The apparatus includes a base delay memory which stores information representing the higher order bits of a time delay, while vernier memori... | 06/06/1989 |
| 4833631 | System for parameter identification of analog signals A system for determining the s-plane parameters, si and ri, of the transient response, ##EQU1## of a network-under-test (NUT). A filter bank, including N serially connected filter elements, has an input port and N output ports b... | 05/23/1989 |
| 4824521 | Planarization of metal pillars on uneven substrates A method for forming vertical metal interconnects on a semiconductor substrate having an uneven surface comprises first forming a laminated metal structure over the entire substrate. The laminated metal structure includes a first metallization sublayer, a... | 04/25/1989 |
| 4820944 | Method and apparatus for dynamically controlling the timing of signals in automatic test systems Apparatus for delaying an electrical signal includes a sequence of stages, each for delaying the signal. A coarser stage delays the signal by multiples of a predetermined fundamental delay interval and a finer stage provides for fine adjustment of the del... | 04/11/1989 |
| 4820967 | BiCMOS voltage reference generator A BiCMOS voltage reference generator circuit generates and maintains a reference voltage within 3 mV over an 80° C. temperture range and over a 1 volt change in power supply level. The circuit uses feedback from the output of the reference voltage genera... | 04/11/1989 |
| 4817175 | Video stream processing system A video stream processing system comprising a novel modular family of image processing and pattern recognition submodules, the submodules utilize a unique system signalling and interface protocol, and thus can be cascaded and paralleled to produce complex... | 03/28/1989 |
| 4813001 | AC calibration method and device by determining transfer characteristics A method for determining the transfer function of a data acquisition system involves inputting a set of bilevel input test patterns to the system and measuring the system's response. The input test patterns from a complete orthogonal set. The input test p... | 03/14/1989 |
| 4811215 | Instruction execution accelerator for a pipelined digital machine with virtual memory An instruction execution accelerator for a pipelined digital machine with virtual memory. The digital machine includes a pipelined processor which on memory accesses outputs a virtual address to a data cache unit (DCU). On particular memory accesses, such... | 03/07/1989 |
| 4804979 | Single-pass color plotter A printer/plotter incorporates four individual microprocessor-based print stations, each for printing on a print media a separate color image for superimposition with one another, forming a final full-color image. The four print stations are located along... | 02/14/1989 |
| 4804810 | Apparatus and method for tape bonding A bonding apparatus for eutectically bonding tape leads to semiconductors and other substrates includes four separate bonding rails for applying heat. The bonding rails have a preselected distribution of mass along their length in order to compensate for ... | 02/14/1989 |
| 4795984 | Multi-marker, multi-destination timing signal generator A multi-marker, multi-destination timing signal generator including a count-setting memory for storing a plurality of pulse-count values in a numerical order and a pulse counter for counting the number of pulses from a master clock. An output selection me... | 01/03/1989 |
| 4791473 | Plastic package for high frequency semiconductor devices A plastic semiconductor package suitable for high frequency operation includes an internal ground plane connected to a ground ring formed on the packaged semiconductor device. The ground plane is included as a portion of a lead frame strip adjacent to the... | 12/13/1988 |
| 4791675 | VSP Connectivity pattern recognition system An image processing system for computing morphological characteristics of object regions in a binary image frame. The characteristics are generated at the frame rate. One embodiment utilizes an architecture including an interconnected delay component, bit... | 12/13/1988 |
| 4789835 | Control of signal timing apparatus in automatic test systems using minimal memory A system which enables signals to be supplied at precisely desired times in an automatic test system. The apparatus includes a base delay memory which stores information related to a base time delay, while a vernier memory stores information relating to t... | 12/06/1988 |
| 4764480 | Process for making high performance CMOS and bipolar integrated devices on one substrate with reduced cell size There is disclosed a high performance MOS transistor structure of either the N channel or P channel variety and a high performance bipolar transistor structure. A process is disclosed which can make high performance CMOS and high performance bipolar devic... | 08/16/1988 |
| 4763288 | System for simulating electronic digital circuits A simulation system for visual signal processing circuits is presented which provides a detailed, pixel level analysis of the timing while actually performing the simulation at the frame level. Input to the circuit is the form of images captured by a vide... | 08/09/1988 |
| 4762801 | Method of fabricating polycrystalline silicon resistors having desired temperature coefficients A method of fabricating polycrystalline silicon resistors having nearly zero or positive temperature coefficient includes the steps of depositing a layer of polycrystalline silicon, implanting the layer with silicon to make the layer substantially amorpho... | 08/09/1988 |
| 4763027 | Deglitching network for digital logic circuits A deglitching network for digital logic circuits includes a voltage actuated current source coupled to a linear tracking, constant voltage column clamp circuit. The deglitching network threshold level tracks closely with the predetermined voltage of the c... | 08/09/1988 |
| 4760282 | High-speed, bootstrap driver circuit A line driver circuit capable of operating at high speeds. The output transistor, an emitter connected to an output terminal, has a special feedback capacitor connected to its base. The feedback capacitor helps pull the output terminal high to increase th... | 07/26/1988 |
| 4754412 | Arithmetic logic system using the output of a first alu to control the operation of a second alu An arithmetic logic system for performing a variety of arithmetic and logical functions on pixel input streams such as averaging down the input image stream, computation of absolute values, and signed or unsigned, clipped or unclipped, addition, subtracti... | 06/28/1988 |
| 4752829 | Multipacket charge transfer image sensor and method An image sensor is disclosed which is capable of handling large amounts of signal charge with small shift registers. The image sensor includes photoelements 10 in which charge is accumulated in response to sensed conditions; electrically-controllable tran... | 06/21/1988 |
| 4745562 | Signal processing disparity resolution A process for signal matching. The process is general and can be applied to matching signals of arbitrary dimension. To implement the process, a suitable discretized description of the two signals to be matched is defined. Such descriptions can be the loc... | 05/17/1988 |
| 4742551 | Multistatistics gatherer A subsystem component for use in an image processing system to compute a gray scale histogram function or various statistical functions relating to the coordinates of a region or regions in a binary image. A selected function is computed at the video rate... | 05/03/1988 |
| 4740776 | Apparatus for compensating digital to analog converter errors A high precision digital to analog converter comprises the combination of an imperfect or low resolution digital to analog converter having an error function known in terms of orthonormal components and an error compensating device capable of generating c... | 04/26/1988 |
| 4740802 | Invisible electrostatic tracking indicia for color plotters A method for determining the position of media in a system where images are applied to the media at subsequent stations includes the steps of placing on the media at a first position tracking information consisting of a pattern of electrostatic charge to ... | 04/26/1988 |
| 4734788 | Single pass electrostatic color printer/plotter having straight paper path A color printer/plotter includes a frame having a paper inlet, a number of print stations, and a paper outlet. The paper is pulled past the print stations by a single driver at the paper outlet. Each print station includes a electrostatic charging head ha... | 03/29/1988 |
| 4734671 | Strain gage beam having integral overload protection A sensitive deflector beam having an integral deflectable element utilizes an immobilization pin and a limit pin to prevent damage to the deflectable element during fabrication and use. The immobilization pin is inserted through the beam and to the deflec... | 03/29/1988 |
| 4734382 | BiCMOS process having narrow bipolar emitter and implanted aluminum isolation A bipolar/CMOS process includes bipolar transistors having emitters formed in less than a minimal masking dimension. An opening is formed through a polycrystalline silicon layer deposited on a silicon substrate. After coating the sides of the opening with... | 03/29/1988 |
| 4727046 | Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases A process is disclosed for simultaneously fabricating bipolar and complementary field effect transistors. The process enables distinguishing the bipolar devices from the CMOS devices with a single base mask 108, while requiring only a single additional ma... | 02/23/1988 |
| 4680626 | Color image processing system for converting analog video-to-digital data A color image processing system is described which provides more realistic hard copy color images from composite video system input signals than previously available. The image processing system includes a synchronization separator 20 which operates to se... | 07/14/1987 |
| 4675562 | Method and apparatus for dynamically controlling the timing of signals in automatic test systems Apparatus for delaying an electrical signal includes a sequence of stages, each for delaying the signal. A coarser stage delays the signal by multiples of a predetermined fundamental delay interval and a finer stage provides for fine adjustment of the del... | 06/23/1987 |
| 4672450 | Composite video synchronization pulse separator for color image processor An image processing system includes a synchronization separator 20 which operates to separate the synchronization pulses from the analog video information supplied. The separator includes an amplifier with a pair of input terminals. The video is coupled t... | 06/09/1987 |
| 4651038 | Gate having temperature-stabilized delay A circuit technique for stabilizing the timing of signals at an output node of a gate, despite substantial variations in temperature. In a gate having a switching portion and an emitter follower, the temperature-dependence of the gate delay within the swi... | 03/17/1987 |
