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| Number | Title | Issue Date |
| 5612576 | Self-opening vent hole in an overmolded semiconductor device A self-opening vent hole semiconductor device (10) can be manufactured to reduce the risk of popcorning during solder reflow. The device contains a semiconductor die (22) mounted on a die mounting area (15) of a substrate (12). A venting hole (16) is appr... | 03/18/1997 |
| 5580829 | Method for minimizing unwanted metallization in periphery die on a multi-site wafer A method and apparatus for providing a mask (200) on a multi-site wafer (100) is accomplished by first creating a first mask key (204) which contains information, such as alignment cues and test structures. A copy of the first mask key is modified to prod... | 12/03/1996 |
| 5571734 | Method for forming a fluorinated nitrogen containing dielectric This disclosure reveals a manufacturable and controllable method to fabricate a dielectric which increases the device current drive. A nitrogen-containing ambient is used to oxidize a surface of a substrate (10) to form a nitrogen-containing dielectric (1... | 11/05/1996 |
| 5548625 | Method for parallel multiple field processing in X-ray lithography A method for performing multiple field parallel processing in x-ray lithography uses a coupled mirror assembly (30) and a coupled mask assembly (22) to define and print multiple fields (54 & 54') in one step. The coupled mirror assembly (30) has multiple ... | 08/20/1996 |
| 5527424 | Preconditioner for a polishing pad and method for using the same A preconditioning plate (10) prepares the surface of a polishing pad (24) to prepare the pad's surface for subsequent metal polishing of semiconductor wafers (27). The preconditioning plate has at least three intersecting radial ridges (14) on its surface... | 06/18/1996 |
| 5517056 | Molded carrier ring leadframe having a particular resin injecting area design for gate removal and semiconductor device employing the same A leadframe (30) having a novel resin injecting area (44) is disclosed to facilitate and control the removal of a molded gate (18) prior to excising a semiconductor device(70) from a carrier ring (14). The carrier ring has a corner which is on a diagonal ... | 05/14/1996 |
| 5508556 | Leaded semiconductor device having accessible power supply pad terminals A semiconductor die (14) is mounted over a power supply surface (24, 52, 62). Signal bonding pads (18) on the die are wire bonded to corresponding leads (38) of a leadframe. Power supply bonding pads (20, 21) on the die are wire bonded to the power supply... | 04/16/1996 |
| 5492223 | Interlocking and invertible semiconductor device tray and test contactor mating thereto A tray (10') for handling a semiconductor device encapsulated in a package body and having multiple electrical I/Os projecting from the package body has cell-to-cell interlocking capability as well as invertibility. An interlocking nest feature (16) is fo... | 02/20/1996 |
| 5483098 | Drop-in heat sink package with window frame flag A molded semiconductor device (24) having greater resistance to package cracking during board mounting in addition to increased thermal performance is provided wherein the device has a reduced semiconductor die to flag interface and a drop-in heat sink. T... | 01/09/1996 |
| 5476566 | Method for thinning a semiconductor wafer Advances in wafer technology and packaging have led to an increase in wafer size while requiring a decrease in wafer thickness. Thickness limitations increase as wafer diameter increases. Thinning a wafer past a certain limit can result in wafer breakage.... | 12/19/1995 |
| 5474958 | Method for making semiconductor device having no die supporting surface A wire bondable plastic encapsulated semiconductor device (58) having no die supporting surface can be manufactured. In one embodiment, a semiconductor die (22) and a plurality of conductors (12) extending toward the periphery of the die are provided. The... | 12/12/1995 |
| 5468995 | Semiconductor device having compliant columnar electrical connections An array type semiconductor device (10 and 40) has compliant polymer columnar I/O connections (30) to accommodate thermally induced stress during device operation. The device has a semiconductor die (22) mounted to a substrate (12) and electrically connec... | 11/21/1995 |
| 5468655 | Method for forming a temporary attachment between a semiconductor die and a substrate using a metal paste comprising spherical modules A nodular metal paste (42) is used to temporarily attach the bumps (34) on a semiconductor die (32) to a substrate (38). The spherical nodules (44) composing the metal paste are dispensed onto contact pads (40) on the substrate, and then heated until they... | 11/21/1995 |
| 5451543 | Straight sidewall profile contact opening to underlying interconnect and method for making the same A method for making a vertical profile contact opening (18) uses an etch stop layer (14), interposed between a conductor layer (10) and a dielectric layer (16), to eliminate resputtering of the underlying conductor material which prevents tapering of the ... | 09/19/1995 |
| 5450283 | Thermally enhanced semiconductor device having exposed backside and method for making the same A thermally enhanced semiconductor device (10) having an exposed backside (22) is described. In one embodiment, a PC board substrate (12) is provided having a pattern of conductive traces (14) on both upper and lower surfaces of the substrate. Electrical ... | 09/12/1995 |
| 5445306 | Wedge wire bonding tool tip A wedge bond tool tip (20, 30, 50, 56) for bonding electronic interconnects to bonding pads of a semiconductor device enables fine-pitch non-orthogonal wire bonding. The tool tip (20, 30, 50, 56) has an overall width and a front face (12', 52) that has a ... | 08/29/1995 |
| 5434452 | Z-axis compliant mechanical IC wiring substrate and method for making the same A compliant integrated circuit (IC) wiring substrate (10) has an insulative carrier film (14) and a plurality of micro-beam conductors (12) in the carrier film. Each of the plurality of micro-beam conductors has a pair of contact bumps (16 and 18) connect... | 07/18/1995 |
| 5416822 | Device for registering a dental radiograph having distortion measuring capability and method for using the same The accuracy of pre-treatment radiographic images is improved by standardizing a technique for placing a bite block in a patient's mouth, by minimizing distortion in the resulting radiograph, and by providing a means for measuring the remaining distortion... | 05/16/1995 |
| 5399507 | Fabrication of mixed thin-film and bulk semiconductor substrate for integrated circuit applications A mixed thin-film and bulk semiconductor substrate (10, 30) for integrated circuit applications is made with two different processes. In the first process, a standard wafer (11) is masked around its periphery (14). The internal unmasked portion (16) is im... | 03/21/1995 |
| 5381039 | Hermetic semiconductor device having jumper leads A fine-pitch hermetic device (10) can be manufactured wherein two sets of wire bonds (18 & 20) are used to electrically connect a semiconductor die (12) to a leadframe (16). Jumper leads or conductive pads (28) are placed on an inner surface of a ceramic ... | 01/10/1995 |
| 5378981 | Method for testing a semiconductor device on a universal test circuit substrate A low cost method is used to standardize testing of bare semiconductor devices. In one embodiment, a universal test circuit substrate (10) having an interleaving fan-out pattern of conductive traces (14) is provided. The radial array of conductive traces ... | 01/03/1995 |
| 5378657 | Method for making an aluminum clad leadframe and a semiconductor device employing the same A quad leadframe (22') for a CERQUAD is manufactured using conventional cladding and stamping technologies. A first metal layer (12) is provided with multiple cavities (14). A second metal layer (14) is clad to the first metal layer. A leadframe strip (22... | 01/03/1995 |
| 5369052 | Method of forming dual field oxide isolation Dual field oxide isolation (34 & 42) is formed by oxidizing through a portion (44) of a silicon nitride layer (30), through an exposed portion (43) of a remaining portion (18) of a masking layer (16), and through an exposed portion (42) of a buffer layer ... | 11/29/1994 |
| 5339518 | Method for making a quad leadframe for a semiconductor device A quad leadframe (30) for a semiconductor device is made from multiple dual-in-line leadframes (10). Two dual-in-line leadframes (10) are provided, wherein each leadframe has two opposing siderails (12) with a plurality of leads (14) connected to those si... | 08/23/1994 |
| 5331205 | Molded plastic package with wire protection A wire bonded semiconductor die in a plastic package having minimal or no wire sweep is provided in which the semiconductor device comprises two different encapsulants. The semiconductor die and the wires including the bonds are completely enveloped by a ... | 07/19/1994 |
| 5329159 | Semiconductor device employing an aluminum clad leadframe A quad leadframe (22') for a CERQUAD is manufactured using conventional cladding and stamping technologies. A first metal layer (12) is provided with multiple cavities (14). A second metal layer (14) is clad to the first metal layer. A leadframe strip (22... | 07/12/1994 |
| 5318181 | Compartmentalized humidity sensing indicator Plastic encapsulated ICs (28) are susceptible to moisture due to the permeability of molding compounds. ICs (28) may be baked until dry before being shipped to the customer to reduce the risk of cracking. To retain this dry condition, ICs (28) are package... | 06/07/1994 |
| 5317107 | Shielded stripline configuration semiconductor device and method for making the same Electrical parasitic parameters can lead to reflections and switching noise in a circuit causing signal distortions. A stripline configuration semiconductor device (10) can be manufactured to reduce the overall parasitic parameters, especially inductance,... | 05/31/1994 |
| 5302849 | Plastic and grid array semiconductor device and method for making the same A plastic land grid array semiconductor device (30) can be manufactured using conventional techniques. In one embodiment, a semiconductor die (12) having an active surface is provided. An LOC leadframe (14) is provided, wherein leads (16) have a horizonta... | 04/12/1994 |
| 5294827 | Semiconductor device having thin package body and method for making the same A thin semiconductor device (50) can be cost effectively manufactured using conventional wire bonding technology and stamped leadframes. A flagless leadframe (12) is utilized in one embodiment. A support tape (14) having a die support surface (20) is atta... | 03/15/1994 |
| 5291062 | Area array semiconductor device having a lid with functional contacts An area array semiconductor device (10) having a lid with functional I/O contacts can be manufactured. In one embodiment, a semiconductor die (12) is mounted in a die cavity (16) of a substrate (14). A plurality of wire bonds (20) connect the die to condu... | 03/01/1994 |
| 5287962 | Vacuum seal indicator for flexible packaging material Plastic encapsulated semiconductor devices are susceptible to moisture due to the permeability of molding compounds. Devices may be baked until dry before being shipped to the customer to reduce the risk of cracking. To retain this dry condition, devices ... | 02/22/1994 |
| 5280193 | Repairable semiconductor multi-package module having individualized package bodies on a PC board substrate A semiconductor multiple package module (10) on a PCB material substrate (18) is provided, wherein semiconductor dice are directly mounted onto the PCB material substrate (18) thereby eliminating a subsequent board mounting at the customer level. A plural... | 01/18/1994 |
