Clapp; Gary D., Solakian; John S. - US Patent Attorneys and Agents

Attorney: Clapp; Gary D., Solakian; John S.

Number of patents: 24
Last date: August 22, 1995

Browse patents
Browse applications

Number	Title	Issue Date
5444848	Distribution of communications connections over multiple service access points by choosing remote and local access points having lowest number of connections A commuications control system for distributing execution of communication connecting among the service access points of a local multiprocessor computer system and remote computer systems interconnected by a communications network. A load balancing module...	08/22/1995
5404515	Balancing of communications transport connections over multiple central processing units A communications control system in a multi-processor system includes a connection distribution data structure, including, for each central processing unit, a connection count means for storing a number representing the number of communication connections ...	04/04/1995
5319645	Method for debugging and testing the correctness of programs Method for debugging and testing the correctness of programs, comprising the loading in a data processing system of a monitoring program, of at least a source program to be testing and of at least an object program achieved by the source program through a...	06/07/1994
5283887	Automatic document format conversion in an electronic mail system based upon user preference In a data processing system having an electronic mail system for sending documents from a first user to a recipient user and, for each user, a means for creating and editing documents, the documents having differing formats, a method for converting a docu...	02/01/1994
5274797	Multiprocessor system with centralized initialization, testing and monitoring of the system and providing centralized timing A data processing unit includes a number of tightly coupled central subsystems, a number of peripheral subsystems, a main memory and a system management facility all coupled in common to a system bus. The system management unit has top priority on the sys...	12/28/1993
5229999	Method and apparatus for integrity testing of fault monitoring logic In a data processing system, a data processing unit contains data processing logic including shadowed functional registers for storing the data being processed. The units also include fault monitoring logic, including, for each shadowed functional registe...	07/20/1993
5226153	Bus monitor with time stamp means for independently capturing and correlating events A monitor for selectively detecting and recording conditions at selected points within a system during operation includes trigger logic connected from first selected points and responsive to selected conditions occurring at each of the first points for ge...	07/06/1993
5210757	Method and apparatus for performing health tests of units of a data processing system A means for ascertaining the health, or basic operational status, of a system unit. A "health check" provides an indication of either "yes", the system unit is operational, or "no", the system unit is either inoperative or there is a question as to whethe...	05/11/1993
5210867	Method and apparatus for memory retry Memory retry logic to improve the resilience of system memory operations with respect to system errors or faults which prevent a memory read operation from being completed on a first attempt by allowing the memory to retry the operation once. The memory r...	05/11/1993
5210862	Bus monitor with selective capture of independently occuring events from multiple sources A monitor device for selectively detecting and recording conditions at selected points within a system during operation, including a trigger enable memory for storing selectable trigger enabling codes wherein each code corresponds to a trigger signal repr...	05/11/1993
5206948	Bus monitor with means for selectively capturing trigger conditions A monitoring means for selectively detecting and recording signals representing at selected points within a system, includes trigger generation logic responsive to selected bus signals for generating trigger signals representing the occurrence of selected...	04/27/1993
5204964	Method and apparatus for resetting a memory upon power recovery A method and apparatus for resetting memory state when power is applied to the system. The memory has memory elements, a refresh clock and a refresh counter for counting refresh cycles and providing refresh signals to the memory elements, the memory eleme...	04/20/1993
5202963	Method and apparatus for adapting a remote communications controller to a variety of types of communications modems A data processing system includes at least one modem connected from a communications link to the remote devices and at least one modem controller. A modem adaptor stores scripts for directing modem control related operation, each script being a sequence o...	04/13/1993
5179671	Apparatus for generating first and second selection signals for aligning words of an operand and bytes within these words respectively A data processing system includes cache memories for storing instructions and operands. An execution unit stores instructions in an instruction FIFO, operands in a data FIFO and offsets in an offset FIFO. Offsets indicate the location of operands relative...	01/12/1993
5173903	Method for performing quality logic tests on data processing systems by sequentially loading test microinstruction programs and operating microinstruction programs into a single control store A method for performing initial testing of a system wherein, in response to power on of the system, the control store of a central subsystem is loaded with a testing microinstruction program for internal testing of the central subsystem and the testing pr...	12/22/1992
5142673	Bus monitor with dual port memory for storing selectable trigger patterns A monitor for selectively detecting and recording conditions at selected points within a system includes a trigger memory for storing patterns of trigger signals, wherein each pattern of trigger signals corresponds to a selected condition to be detected o...	08/25/1992
5006894	Dust containment cap for a printing device employing toner A dust containment cap for use in a printing device to be supplied with finely pulverized toner which is susceptible of becoming airborne and contaminating surrounding areas employs two brushes arranged in the toner supply opening such that they completel...	04/09/1991
4995742	Needle printing head Needle printing head of the permanent magnet type where the armatures of a plurality of printing actuators are attracted, in rest position, against the poles of a permanent magnet and released in printing position by the "cancellation" of the magnetic flu...	02/26/1991
4991984	Belt tensioning means for a serial printer Belt tensioning apparatus for a serial printer wherein a spring imparts a predetermined pull to driving belt by applying a predetermined force to a slide on which a belt return idle pulley is mounted, and wherein a slide is offset from a working point and...	02/12/1991
4972313	Bus access control for a multi-host system using successively decremented arbitration delay periods to allocate bus access among the hosts Any host requesting acccess to the bus must, on its first attempt, wait for N arbitration delay periods after the bus becomes available before attempting to take control of the bus. If another host takes the bus before completion of the arbitration delay ...	11/20/1990
4964129	Memory controller with error logging In accordance with the present invention, there is provided a system for logging an error that occurred in a multi-chip memory storage device in a data processing system. The system has a mechanism for detecting an error and for receiving data and check b...	10/16/1990
4964037	Memory addressing arrangement A memory address controller addresses two memories and selectively modifies an address before it is applied to the addressing input of one of the two memories. A bit of the address is used to indicate to the controller if the address is to be modified. Th...	10/16/1990
4964130	System for determining status of errors in a memory subsystem A system and method for detecting an error that occurred in a multi-chip memory storage device in a data processing system. The system detects an error and receives data and check bits associated therewith. A process that uses the principle of scrubbing a...	10/16/1990
4872110	Storage of input/output command timeout and acknowledge responses A data processing system includes a number of subsystems all coupled in common to a system bus and communicate with each other by sending and receiving commands sent over the system bus. A central processing subsystem includes a response memory for storin...	10/03/1989

PatentStorm

Quotables

PatentStorm News

Attorney: Clapp; Gary D., Solakian; John S.