Celebrity Inventors
Actress Jamie Lee Curtis is a patented inventor - she created a diaper equipped with a premoistened baby wipe. And that's no act!
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7943919 | Integrated circuit with upstanding stylus A stylus, an integrated circuit (IC) and method of forming the IC. The stylus extends upward from its apex and has a substantially circular cross section that decreases in diameter upward from the apex. The stylus is formed in a mold that may be formed in an orifice... | 05/17/2011 |
| 7928420 | Phase change tip storage cell A storage cell, integrated circuit (IC) chip with one or more storage cells that may be in an array of the storage cells and a method of forming the storage cell and IC. Each storage cell includes a stylus, the tip of which is phase change material. The phase change... | 04/19/2011 |
| 7928012 | Integrated circuit with upstanding stylus A stylus, an integrated circuit (IC) and method of forming the IC. The stylus extends upward from its apex and has a substantially circular cross section that decreases in diameter upward from the apex. The stylus is formed in a mold that may be formed in an orifice... | 04/19/2011 |
| 7795068 | Method of making integrated circuit (IC) including at least one storage cell A storage cell, integrated circuit (IC) chip with one or more storage cells that may be in an array of the storage cells and a method of forming the storage cell and IC. Each storage cell includes a stylus, the tip of which is phase change material. The phase change... | 09/14/2010 |
| 7675342 | On-chip electrically alterable resistor A programmable, electrically alterable (EA) resistor, an integrated circuit (IC) chip including the EA resistor and integrated analog circuits using on-chip EA resistors. Phase change storage media form resistors (EA resistors) on an IC that may be formed in an arra... | 03/09/2010 |
| 7378895 | On-chip electrically alterable resistor A programmable, electrically alterable (EA) resistor, an integrated circuit (IC) chip including the EA resistor and integrated analog circuits using on-chip EA resistors. Phase change storage media form resistors (EA resistors) on an IC that may be formed in an arra... | 05/27/2008 |
| 7233177 | Precision tuning of a phase-change resistive element The present invention comprises a method and structure for programming an on-chip phase-change resistor to a target resistance. Using an off-chip precision resistor as a reference, a state-machine determines a difference between the resistance of an on-chip resistor... | 06/19/2007 |
| 7145212 | Method for manufacturing device substrate with metal back-gate and structure formed thereby A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and... | 12/05/2006 |
| 7129548 | MOSFET structure with multiple self-aligned silicide contacts A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field eff... | 10/31/2006 |
| 7128891 | Process of making metal containing iron oxide and iron sulfide based nanoparticle materials A method and structure for making magnetite nanoparticle materials by mixing iron salt with alcohol, carboxylic acid and amine in an organic solvent and heating the mixture to 200–360 C is described. The size of the particles can be controlled either by changing t... | 10/31/2006 |
| 7115965 | Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation The present invention provides a “subcollector-less” silicon-on-insulator (SOI) bipolar junction transistor (BJT) that has no impurity-doped subcollector. Instead, the inventive vertical SOI BJT uses a back gate-induced, majority carrier accumulation layer as th... | 10/03/2006 |
| 7098508 | Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations The invention provides integrated semiconductor devices that are formed upon an SOI substrate having different crystal orientations that provide optimal performance for a specific device. Specifically, an integrated semiconductor structure including at least an SOI ... | 08/29/2006 |
| 7096075 | Apparatus, method and program for physical state controller For determination as to whether there is a possibility that temperature control satisfying conditions according to an upper limit LH_i and a lower limit LL_i of the annealing control temperatures of annealing object steel sections i will be realized under restrictio... | 08/22/2006 |
| 7091078 | Selection of optimal quantization direction for given transport direction in a semiconductor device A technique for selecting an optimal quantization direction for a given transport direction in a semiconductor device such as a field effect transistor (FET), a method for preparing a wafer for fabricating such a semiconductor device, and the semiconductor device fa... | 08/15/2006 |
| 7092235 | Method for adjusting capacitance of an on-chip capacitor A method and apparatus, is herein disclosed, for adjusting capacitance of an on-chip capacitor formed on a substrate. A plurality of conductive layers is separated by a layer ofdielectric material. The dielectric material of the capacitor is exposed to an ion beam. ... | 08/15/2006 |
| 7089515 | Threshold voltage roll-off compensation using back-gated MOSFET devices for system high-performance and low standby power A method for compensating the threshold voltage roll-off using transistors containing back-gates or body nodes is provided. The method includes designing a semiconductor system or chip having a plurality of transistors with a channel length of Lnom. For t... | 08/08/2006 |
| 7082232 | Optical cross-connect switch The invention is related to an optical cross-connect switch comprising a waveguide connected with one waveguide end to a first optical port and connected with its other waveguide end to a steering device for directing an optical signal beam from said first optical p... | 07/25/2006 |
| 7078301 | Rare earth metal oxide memory element based on charge storage and method for manufacturing same A data storage element (and method of forming the same) includes a substrate comprising a semiconductor material, a metal oxide layer including an electrically insulating rare earth metal oxide disposed upon a surface of the substrate, a conductive material disposed... | 07/18/2006 |
| 7078773 | Nitride-encapsulated FET (NNCFET) A double-gate field effect transistor (DGFET) structure and method of forming such a structure in which the parasitic capacitance under the source/drain regions is substantially reduced are provided. In the present invention, self-aligned isolation regions are provi... | 07/18/2006 |
| 7070922 | Surface treatment Described is a process for producing a biomolecular monolayer on a biosensor surface comprising the steps of: reacting a biosensor surface with a solution of heterobifunctional reagent having a first functional group and a second functional group, the first function... | 07/04/2006 |
| 7063127 | Method and apparatus for chip-cooling A thermal interface for IC chip cooling is provided. One embodiment of the thermal interface includes a thermally conductive liquid or paste-like metal(s) disposed within a flexible, thermally conductive enclosure. The enclosure is adapted to be placed between an IC... | 06/20/2006 |
| 7053401 | Synthesis and application of photosensitive pentacene precursor in organic thin film transistors Soluble, photosensitive precursors of pentacene are synthesized by a one-step Diels-Alder reaction of pentacene with N-sulfinylamides. These precursors may include a photopolymerizable group, which renders the pentacene precursor as a negative tone resist. The penta... | 05/30/2006 |
| 7050522 | Phase rotator and data recovery receiver incorporating said phase rotator A phase rotator device for phase shifting an oscillating signal, including an input device having at least one input channel for receiving at least one phase of the oscillating signal and an output device having at least one output channel for delivering at least on... | 05/23/2006 |
| 7046550 | Cross-point memory architecture with improved selectivity A cross-point memory includes a plurality of memory cells, a plurality of global word lines, a plurality of local word lines, and a plurality of global bit lines. At least a given one of the global word lines is configurable for conveying a write current for selecti... | 05/16/2006 |
| 7045851 | Nonvolatile memory device using semiconductor nanocrystals and method of forming same A floating gate for a field effect transistor (and method for forming the same and method of forming a uniform nanoparticle array), includes a plurality of discrete nanoparticles in which at least one of a size, spacing, and density of the nanoparticles is one of te... | 05/16/2006 |
| 7026673 | Low magnetization materials for high performance magnetic memory devices Techniques for attaining high performance magnetic memory devices are provided. In one aspect, a magnetic memory device having one or more free magnetic layers is provided. The one or more free magnetic layers have a low magnetization material adapted to have a satu... | 04/11/2006 |
| 7023055 | CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding A method in which semiconductor-to-semiconductor direct wafer bonding is employed to provide a hybrid substrate having semiconductor layers of different crystallographic orientations that are separated by a conductive interface is provided. Also provided are the hyb... | 04/04/2006 |
| 7018873 | Method of making a device threshold control of front-gate silicon-on-insulator MOSFET using a self-aligned back-gate provides SOI CMOS technology whereby a polysilicon back-gate is used to control the threshold voltage of the front-gate device, and the nMOS and pMOS back-gates are switched independently of each other and the front gates. Specifically, the present invention provide... | 03/28/2006 |
| 6995391 | Electrode structure for electronic and opto-electronic devices The present invention discloses an electrode structure for electronic and opto-electronic devices. Such a device comprises a first electrode substantially having a conductive layer (204), a nonmetal layer (206) formed on the conductive layer, a fluoroc... | 02/07/2006 |
| 6987050 | Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow junctions A method (and resulting structure) for fabricating a silicide for a semiconductor device, includes depositing a metal or an alloy thereof on a silicon substrate, reacting the metal or the alloy to form a first silicide phase, etching any unreacted metal, depositing ... | 01/17/2006 |
| 6987691 | Easy axis magnetic amplifier Techniques for improved semiconductor device performance are provided. In one aspect, a semiconductor device is provided. The device comprises at least one free magnetic layer, and a magnetic amplifier interacting with the free magnetic layer comprising two or more ... | 01/17/2006 |
| 6982460 | Self-aligned gate MOSFET with separate gates A structure and method of manufacturing a double-gate integrated circuit which includes forming a laminated structure having a channel layer and first insulating layers on each side of the channel layer, forming openings in the laminated structure, forming drain and... | 01/03/2006 |
| 6981168 | Clock data recovery system A clock data recovery system is provided for resampling a clock signal according to an incoming data signal stream. It comprises a clock generator for generating said clock signal wherein one of the frequency and phase of that clock signal is dependent upon a contro... | 12/27/2005 |
| 6975124 | Multipoint nanoprobe A nanoprobe includes a substrate having a layer, which forms a projected portion. A plurality of conductive lines is adhered to the projected portion and the lines extend beyond an end of the projected portion by a distance to form contact points, wherein the lines ... | 12/13/2005 |
| 6972046 | Process of forming magnetic nanocomposites via nanoparticle self-assembly A process of forming a hard-soft phase, exchange-coupled, magnetic nanocomposite includes forming a dispersion of magnetic nanoparticles, separating the magnetic nanoparticles from a solvent of the dispersion so as to allow self-assembly of the magnetic nanoparticle... | 12/06/2005 |
| 6967384 | Structure and method for ultra-small grain size polysilicon A method of forming a semiconductor structure (and the resulting structure), includes providing a nitride layer between a silicon-containing layer and a polysilicon layer. ... | 11/22/2005 |
| 6967377 | Double-gate fet with planarized surfaces and self-aligned silicides It is, therefore, an object of the present invention to provide a structure and method for an integrated circuit comprising a first gate, a second gate, and source and drain regions adjacent the first and second gates, wherein the structure has a planar upper struct... | 11/22/2005 |
| 6964892 | N-channel metal oxide semiconductor (NMOS) driver circuit and method of making same An N-channel metal oxide semiconductor (NMOS) driver circuit (and method for making the same), includes a boost gate stack formed on a substrate and having a source and drain formed by a low concentration implantation, and an N-driver coupled to the boost gate stack... | 11/15/2005 |
| 6962685 | Synthesis of magnetite nanoparticles and the process of forming Fe-based nanomaterials A method and structure for making magnetite nanoparticle materials by mixing iron salt with alcohol, carboxylic acid and amine in an organic solvent and heating the mixture to 200–360 C is described. The size of the particles can be controlled either by changing t... | 11/08/2005 |
| 6946696 | Self-aligned isolation double-gate FET A double-gate field effect transistor (DGFET) structure and method of forming such a structure in which the parasitic capacitance under the source/drain regions is substantially reduced are provided. Two new means to reduce the parasitic capacitance under the source... | 09/20/2005 |
