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| Number | Title | Issue Date |
| 7656682 | Electromagnetic noise reduction device Briefly, in accordance with one embodiment of the invention, an electromagnetic interference (EMI) reduction device may include a circuit and at least one heatsink. The circuit may include analog devices coupled to reduce EMI signals received by the heatsink. The de... | 02/02/2010 |
| 7638397 | Method of forming quantum wire gate device The present invention relates to a method of forming a quantum wire gate device. The method includes patterning a first oxide upon a substrate. Preferably the first oxide pattern is precisely and uniformly spaced to maximize quantum wire numbers per unit area. The m... | 12/29/2009 |
| 7611806 | Sub-wavelength diffractive elements to reduce corner rounding The present invention discloses a mask including: a first region near a corner of a feature, the first region including a first element, the first element being transparent to a light, the first element having a side that is smaller than a wavelength of said light; ... | 11/03/2009 |
| 7605469 | Atomic layer deposited tantalum containing adhesion layer Apparatus and methods of fabricating an atomic layer deposited tantalum containing adhesion layer within at least one dielectric material in the formation of a metal, wherein the atomic layer deposition tantalum containing adhesion layer is sufficiently thin to mini... | 10/20/2009 |
| 7604834 | Formation of dielectric film by alternating between deposition and modification The present invention discloses a method including: providing a substrate; and sequentially stacking layers of two or more diamond-like carbon (DLC) films over the substrate to form a composite dielectric film, the composite dielectric film having a k value of about... | 10/20/2009 |
| 7601637 | Atomic layer deposited tantalum containing adhesion layer Apparatus and methods of fabricating an atomic layer deposited tantalum containing adhesion layer within at least one dielectric material in the formation of a metal, wherein the atomic layer deposition tantalum containing adhesion layer is sufficiently thin to mini... | 10/13/2009 |
| 7571420 | Dynamic sampling with efficient model for overlay The present invention describes a method including: determining field-clustering scheme; selecting initial sample plan; establishing initial model of overlay, the initial model of overlay comprising components; and establishing efficient model of overlay from the in... | 08/04/2009 |
| 7563727 | Low-k dielectric layer formed from aluminosilicate precursors A method for forming a high mechanical strength, low k, interlayer dielectric material with aluminosilicate precursors so that aluminum is facilely incorporated into the silicon matrix of the material, and an integrated circuit device comprising one or more high-str... | 07/21/2009 |
| 7556894 | Mask with minimum reflectivity over absorber layer A reflective mask may include an anti-reflective (AR) coating on an absorber layer to improve inspection contrast in an inspection system using deep ultraviolet (DUV) light. A silicon nitride (Si3N4) AR coating may be used on a chromium (Cr) or... | 07/07/2009 |
| 7539016 | Electromagnetically-actuated micropump for liquid metal alloy enclosed in cavity with flexible sidewalls The present invention discloses a method of confining a liquid metal alloy within a closed-loop system; distributing a first portion of the liquid metal alloy in a cavity within the closed-loop system; turning on an electromagnet to generate a magnetic field to perm... | 05/26/2009 |
| 7527722 | Electrochemical mechanical planarization The present invention discloses an apparatus having a platen; a polishing pad disposed over the platen; a slurry dispenser disposed over the polishing pad; a cathode connected electrically to the polishing pad; a wafer carrier disposed over the polishing pad; ... | 05/05/2009 |
| 7525196 | Protection of seedlayer for electroplating The present invention includes a method of providing a substrate; sequentially forming a seed layer over the substrate and forming a protection layer over the seed layer; and sequentially removing the protection layer and forming a conductor over the seed layer.... | 04/28/2009 |
| 7522335 | Broad-angle multilayer mirror design According to one embodiment a broad-angle multilayer (ML) mirror system is disclosed. The ML mirror includes a multiple layer structure configured to provide uniform reflectivity over a wide range of angles with small phase shifts. ... | 04/21/2009 |
| 7517642 | Plane waves to control critical dimension The present invention describes an aperture including: an opaque plate; two sliver openings located in the opaque plate, the two sliver openings having rectangular shapes, the two sliver openings being parallel to each other. The present invention further describes ... | 04/14/2009 |
| 7514274 | Enhanced uniqueness for pattern recognition The present invention describes a test structure with a first set of features which is a subset of product features; and a second set of features adjacent to the first set of features, the second set occupying a smaller area than the first set and the second set bei... | 04/07/2009 |
| 7512926 | Phase-shifting masks with sub-wavelength diffractive optical elements The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a first characteristic linear dimension that is 15% or less of a wavelength... | 03/31/2009 |
| 7510927 | LOCOS isolation for fully-depleted SOI devices The present invention discloses a method including: providing a substrate; forming a buried oxide layer over the substrate; forming a thin silicon body layer over the buried oxide layer, the thin silicon body layer having a thickness of 3-40 nanometers; forming a pa... | 03/31/2009 |
| 7501641 | Dual hemispherical collectors A system and method for collecting radiation, which may be used in a lithography illumination system. The system comprises a first surface shaped to reflect radiation in a first hemisphere of a source to illuminate in a second hemisphere of the source; and a second ... | 03/10/2009 |
| 7464212 | Method and apparatus for determining compatibility between devices Embodiments are generally directed to a method and apparatus for determining compatibility between devices. In one embodiment, a table including a module's parameters and rules associated therewith is obtained from a module. The rules are applied to a slot's paramet... | 12/09/2008 |
| 7459321 | Method of storing a data bit in a fast-write alloy Alloy memory structures and methods are disclosed wherein a layer or volume of alloy material changes conductivity subsequent to introduction of a electron beam current-induced change in phase of the alloy, the conductivity change being detected using current detect... | 12/02/2008 |
| 7446873 | Reflective alignment grating A wafer may be aligned with an imaging plate including an alignment grating with a pitch P. A pupil filter in the pupil plane of the optical system may be used so that the periodicity of the intensity of light from the alignment grating is less than P at the wafer p... | 11/04/2008 |
| 7435637 | Quantum wire gate device and method of making same The present invention relates to a method of forming a quantum wire gate device. The method includes patterning a first oxide upon a substrate. Preferably the first oxide pattern is precisely and uniformly spaced to maximize quantum wire numbers per unit area. The m... | 10/14/2008 |
| 7410733 | Dual-layer EUV mask absorber with trenches having opposing sidewalls that are straight and parallel A composite extreme ultraviolet light (EUV) mask absorber structure and method are disclosed to address the structural and processing requirements of EUV lithography. A first mask absorber layer anisotropically etched with minimal etch bias at a relatively fast etch... | 08/12/2008 |
| 7407868 | Chemical thinning of silicon body of an SOI substrate The present invention discloses a method including: providing a silicon wafer; forming a buried oxide (BOX) in the silicon wafer below a silicon body; and reducing a thickness of the silicon body by chemical thinning. ... | 08/05/2008 |
| 7387841 | Silicone-based cyanate-ester cross-linkable die attach adhesive The present invention describes a method including: providing a material A, the material A including a siloxane backbone with a hydride functional group; reacting the material A with a material B in the presence of a catalyst to form a material C, the material B inc... | 06/17/2008 |
| 7384715 | Forming an EUV mask with a phase-shifter layer and an intensity balancer layer The present invention describes a method including: providing a substrate, the substrate including a first region and a second region; forming a multilayer mirror over the substrate; forming a phase-shifter layer over the multilayer mirror; forming a capping layer o... | 06/10/2008 |
| 7384693 | Diamond-like carbon films with low dielectric constant and high mechanical strength The present invention discloses a method including: providing a substrate; and sequentially stacking layers of two or more diamond-like carbon (DLC) films over the substrate to form a composite dielectric film, the composite dielectric film having a k value of about... | 06/10/2008 |
| 7348130 | Electron exposure to reduce line edge roughness The present invention describes a method including providing a substrate; forming a photoresist on the substrate; performing a post-apply bake on the photoresist; exposing the photoresist to actinic radiation; performing a post-exposure bake on the photoresist; deve... | 03/25/2008 |
| 7315459 | Electromagnetic noise reduction device Briefly, in accordance with one embodiment of the invention, an electromagnetic interference (EMI) reduction device may include a circuit and at least one heatsink. The circuit may include analog devices coupled to reduce EMI signals received by the heatsink. The de... | 01/01/2008 |
| 7307005 | Wafer bonding with highly compliant plate having filler material enclosed hollow core The present invention discloses a method that includes: providing two wafers; forming raised contacts on the two wafers; aligning the two wafers; bringing together the raised contacts; locally deflecting the two wafers; and bonding the raised contacts. The pr... | 12/11/2007 |
| 7303989 | Using zeolites to improve the mechanical strength of low-k interlayer dielectrics A method for impregnating the pores of a zeolite low-k dielectric layer with a polymer, and forming an interconnect structure therein, thus mechanically strengthening the dielectric layer and preventing metal deposits within the pores. ... | 12/04/2007 |
| 7300871 | Method of doping a conductive layer near a via A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an electromigration retarding amount of a dopant near the via than away fr... | 11/27/2007 |
| 7271434 | Capacitor with insulating nanostructure The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper con... | 09/18/2007 |
| 7265406 | Capacitor with conducting nanostructure The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper con... | 09/04/2007 |
| 7226831 | Device with scavenging spacer layer Embodiments of the invention provide a device with a metal gate, a high-k gate dielectric layer and reduced oxidation of a substrate beneath the high-k gate dielectric layer. An oxygen-scavenging spacer layer on side walls of the high-k gate dielectric layer and met... | 06/05/2007 |
| 7211872 | Device having recessed spacers for improved salicide resistance on polysilicon gates A method and device for improved salicide resistance in polysilicon gates under 0.20 μm. The several embodiments of the invention provide for formation of gate electrode structures with recessed and partially recessed spacers. One embodiment, provides a gate electr... | 05/01/2007 |
| 7211638 | Silicone-based cyanate-ester cross-linkable die attach adhesive The present invention describes a method including: providing a material A, the material A including a siloxane backbone with a hydride functional group; reacting the material A with a material B in the presence of a catalyst to form a material C, the material B inc... | 05/01/2007 |
| 7211449 | Enhanced uniqueness for pattern recognition The present invention describes a test structure with a first set of features which is a subset of product features; and a second set of features adjacent to the first set of features, the second set occupying a smaller area than the first set and the second set bei... | 05/01/2007 |
| 7208747 | Adjustment of distance between source plasma and mirrors to change partial coherence According to an embodiment of the invention, an adjustable EUV light source may be used for photolithography. The EUV light source, such as an electrode, is mounted in an adjustable housing. The housing can be adjusted to change the distance between the light source... | 04/24/2007 |
| 7208366 | Bonding gate oxide with high-k additives A technique for producing a thin gate oxide having a relatively high dielectric constant. Embodiments relate to the structure and development of a gate oxide having a thickness of less than 1 nm, having a dielectric constant greater than twenty, and being substantia... | 04/24/2007 |
