Carlson; David V., Galanthay; Theodore E., Jorgenson; Lisa K. - US Patent Attorneys and Agents

Attorney: Carlson; David V., Galanthay; Theodore E., Jorgenson; Lisa K.

Number of patents: 121
Last date: October 23, 2001

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Number	Title	Issue Date
6307415	Hysteresis circuit The a timer circuit and oscillator are disclosed. The timer circuit is similar in functionality to a '555 timer circuit but uses few transistors. The timer circuit has two differential pairs of transistors, three current mirrors, two selectable current so...	10/23/2001
6291845	Fully-dielectric-isolated FET technology A field-effect transistor structure wherein a single patterned thin film semiconductor layer: is monocrystalline, and epitaxially matched to and dielectrically isolated from an underlying body region, in channel locations; and is polycrystalline in source...	09/18/2001
6285801	Non-linear adaptive image filter for filtering noise such as blocking artifacts A filter reduces artifacts, such as grid noise and staircase noise, in block-coded digital images with image block boundaries. The type of filtering is determined after an estimation of the image global metrics and local metrics. For areas of the image ne...	09/04/2001
6259305	Method and apparatus to drive the coil of a magnetic write head A circuit and method to drive an H-bridge circuit is disclosed. The H-bridge circuit uses NMOS transistors for both the upper and lower sets of transistors. An inductive head is coupled between the terminals of the transistors. When a logic signal is rece...	07/10/2001
6243778	Transaction interface for a data communication system A system architecture for a high speed serial bus compatible with the 1394 standard is disclosed. A transaction interface coordinates data packets received from or sent to a 1394 bus. A kernel/scheduler/dispatcher is used to allocate memory resources, and...	06/05/2001
6215170	Structure for single conductor acting as ground and capacitor plate electrode using reduced area The device described permits selection between two design options of an integrated circuit by causing a corresponding circuit unit of the integrated circuit to adopt one of two possible different operative states. It comprises an inverter, of which the ou...	04/10/2001
6211727	Circuit and method for intelligently regulating a supply voltage The intelligent power supply regulator is used to adjust a supply voltage until an adjusted supply voltage to a served device is at or near the optimal supply voltage of the served device and thereafter maintain the adjusted supply voltage at or near the ...	04/03/2001
6191593	Method for the non-invasive sensing of physical matter on the detection surface of a capacitive sensor A capacitance sensor detects the absence/presence of physical matter on a sensing surface of the sensor. The capacitive sensor is a multi-cell sensor wherein each cell has one or more buried, protected, and physically inaccessible capacitor plates. The se...	02/20/2001
6180989	Selectively doped electrostatic discharge layer for an integrated circuit sensor A structure and method for creating an integrated circuit passivation structure comprising, a circuit, a dielectric, and metal plates over which an insulating layer is disposed that electrically isolates the circuit, and a discharge layer that is deposite...	01/30/2001
6166869	Method and circuit for enabling rapid flux reversal in the coil of a write head associated with a computer disk drive, or the like An H-bridge for applying a current to a coil of a write head assembly for writing data to a magnetic media includes two pair of two switchable transistors. Each pair of transistors is connected between a supply voltage and a reference potential and is ada...	12/26/2000
6147899	Radiation hardened SRAM device having cross-coupled data cells A memory cell with increased resistance to high energy particle radiation. When a memory cell is subjected to high energy particles hit, such as may occur in outer space or in certain harsh environments, design is provided that ensures the data will be ma...	11/14/2000
6133107	Process for co-integrating DMOS transistors with schottky diode body structure A DMOS device in a complex integrated circuit having a well region defined by a buried isolation region and an overlapping deep drain region within an epitaxial layer formed over a substrate, a body region having two source regions within the well region,...	10/17/2000
6128243	Shadow memory for a SRAM and method A method of operating a memory cell includes detecting a first power supply anomaly or condition. When the first power supply condition occurs, memory cell access to bit lines is disabled, a series of shadow memory access FETs within the memory cells are ...	10/03/2000
6127868	Timer circuit The a timer circuit and oscillator are disclosed. The timer circuit is similar in functionality to a '555 timer circuit but uses few transistors. The timer circuit has two differential pairs of transistors, three current mirrors, two selectable current so...	10/03/2000
6118602	Preamplifier for a read/write head A multi-head, disc drive, of a data storage system having a preamplifier that is split into a mother chip and set of daughter chips, each daughter chip corresponding to a head in the disc drive. The daughter chips contain very little circuitry, typically ...	09/12/2000
6113399	Low-profile socketed packaging system with land-grid array and thermally conductive slug A socketed integrated circuit packaging system, including a packaged integrated circuit and a socket therefor, is disclosed. The integrated circuit package includes a device circuit board to which a thermally conductive slug is mounted; the underside of t...	09/05/2000
6114862	Capacitive distance sensor A distance sensor has a capacitive element in turn having a first capacitor plate which is positioned facing a second capacitor plate whose distance is to be measured. In the case of fingerprinting, the second capacitor plate is defined directly by the sk...	09/05/2000
6108455	Non-linear image filter for filtering noise A system and method for reducing noise using recursive noise level estimation. The system and method for noise reduction substitute a target pixel in a processing window with a weighted average of a plurality of neighboring pixels according to the degree ...	08/22/2000
6104249	Highly linear transconductance circuit and filter using same An integrated circuit includes a transconductance circuit having a bias current generator coupled to a power supply. The bias current generator may include a current mirror circuit having an input and an output, where a current at the output is proportion...	08/15/2000
6104416	Tiling in picture memory mapping to minimize memory bandwidth in compression and decompression of data sequences A method of storing a picture in a memory such that the latency of the memory can be reduced when retrieving a picture from the memory to be displayed while still reducing the bandwidth when retrieving an array portion of the picture from the memory, and ...	08/15/2000
6091630	Radiation hardened semiconductor memory A radiation hardened memory device having static random access memory cells includes active gate isolation structures placed in series with oxide isolation regions between the active regions of a memory cell array. The active gate isolation structure incl...	07/18/2000
6091082	Electrostatic discharge protection for integrated circuit sensor passivation A structure and method for creating an integrated circuit passivation (24) comprising, a circuit (16), a dielectric (18), and metal plates (20) over which an insulating layer (26) is disposed that electrically and hermetically isolates the circuit (16), a...	07/18/2000
6091222	Statistical phase detection and go start-up algorithm A method for starting a polyphase DC motor having a rotor. The position of the rotor is detected by initiating current in each of the phases of the motor and measuring a time period between the initiation of current in the coil and an instant when the cur...	07/18/2000
6084378	Variable slew rate pulse width modulation system A method and a circuit for controlling a slew rate of a coil in a voice coil motor in a disk drive system. A slew rate control signal is generated by a microprocessor or by an analog circuit in response to one or more operating parameters of the disk driv...	07/04/2000
6081112	Method and circuit for determining the velocity of a data detector mechanism of a mass storage device, or the like, using a BEMF voltage in the associated voice coil A circuit and method for measuring a back EMF voltage of a voice coil in a mass storage device, or the like, includes an amplifier connected across the coil to produce an output signal proportional to a voltage across the coil and a circuit connected to s...	06/27/2000
6058459	Video/audio decompression/compression device including an arbiter and method for accessing a shared memory An electronic system provides direct access between a first device and a decoder/encoder and a memory. The electronic system can be included in a computer in which case the memory is a main memory. Direct access is accomplished through one or more memory ...	05/02/2000
6052017	Method and circuit for enabling rapid flux reversal in the coil of a write head associated with a computer disk drive, or the like A method and apparatus, for applying a current to a coil of a write head assembly of a disk drive, or the like, to cause the flux within the coil to rapidly reverse, has an H-bridge having two pair of two switchable transistors. Each pair of the transisto...	04/18/2000
6046473	Structure and process for reducing the on-resistance of MOS-gated power devices A VDMOS structure with an added n- doping component, and a LOCOS oxide self-aligned to it, at tie surface extension of the drain. The additional shallow n- component permits the body diffusion to be heavier, and hence reduces the risk of latchup....	04/04/2000
6043943	Asymmetry correction for a read head A method and a circuit for correcting asymmetry in a response signal generated by a magneto-resistive head. The magneto-resistive head generates a response signal to transmit digital information read from a magnetic media storage device. The asymmetry is ...	03/28/2000
6044004	Memory integrated circuit for storing digital and analog data and method A memory device includes an array of floating gate FET memory cells capable of storing either analog or digital data. The memory device includes first read-write circuitry for storage and retrieval of digital data, and second read-write circuitry for stor...	03/28/2000
6040233	Method of making a shallow trench isolation with thin nitride as gate dielectric A semiconductor structure comprises a silicon substrate of a first conductivity type including wells of a second conductivity type disposed on a surface thereof and a dielectric layer including silicon nitride disposed on the surface. The dielectric layer...	03/21/2000
6037799	Circuit and method for selecting a signal A multiplexing circuit includes a reference terminal, a plurality of multiplexing input terminals, and a buffer having an input terminal and an output terminal. The multiplexing circuit also includes a plurality of first elements that each have a programm...	03/14/2000
6038198	Timer circuit A timer circuit and oscillator are disclosed. The timer circuit is similar in functionality to a '555 timer circuit but uses few transistors. The timer circuit has two differential pairs of transistors, three current mirrors, two selectable current source...	03/14/2000
6034886	Shadow memory for a SRAM and method A method of operating a memory cell includes detecting a first power supply anomaly or condition. When the first power supply condition occurs, memory cell access to bit lines is disabled, a series of shadow memory access FETs within the memory cells are ...	03/07/2000
6028635	Reducing the memory required for decompression by storing compressed information using DCT based techniques A method of reducing the memory required for decompression of a compressed frame by storing frames in a compressed format using DCT compression and decoders for implementing such a method are disclosed. The decoder is coupled to a memory where the frame c...	02/22/2000
6028612	Picture memory mapping to minimize memory bandwidth in compression and decompression of data sequences A method of a storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a pictu...	02/22/2000
6028773	Packaging for silicon sensors An integrated circuit package for direct mounting of an integrated circuit die to a printed circuit board is disclosed. The integrated circuit die includes a silicon sensor that detects changes in external variables, such as providing an image of a human ...	02/22/2000
6006354	Security device for a video digital to analog converter A method and circuits for checking for a pattern on a display is provided where the CRC of the pattern is calculated and compared to a CRC reference. A blanking signal is produced when the two patterns do not match. Video pixel data and a first seed value...	12/21/1999
6005790	Floating gate content addressable memory A non-volatile storage device storing a data bit received from a bitline via an accessing circuit. A coupling circuit couples either the bitline, or a complementary bitline to a biasing circuit dependent on the logic level of the data bit stored in the st...	12/21/1999
6005359	Power down brake latch circuit for a brushless DC motor A power down brake latch circuit for dynamically braking a spindle motor in a disk drive system is disclosed. The power down brake latch circuit includes a reservoir capacitor, a smoothing capacitor, a timing circuit, and a logic circuit. The timing circu...	12/21/1999

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Attorney: Carlson; David V., Galanthay; Theodore E., Jorgenson; Lisa K.