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| Number | Title | Issue Date |
| 8185790 | Resynchronization memory in series/parallel with control/output data scan cells An integrated circuit or circuit board includes functional circuitry and a scan path. The scan path includes a test data input lead, a test data output lead, a multiplexer, and scan cells. A dedicated scan cell has a functional data output separate from a test data ... | 05/22/2012 |
| 8185789 | Capturing response after simultaneously inputting last stimulus bit in scan path subdivisions Scan and Scan-BIST architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure improves upon low power Scan and Scan-BIST methods. The improvement allows the low power Scan and Scan-BIST architectures to achieve a delay t... | 05/22/2012 |
| 8181067 | Apparatus and method for test and debug of a processor/core having advanced power management An interface unit is provided in a JTAG test and debug procedure involving a plurality of processor cores. The interface unit includes a TAP unit. A switch unit is coupled to the interface unit and switch units are coupled to each of the plurality of processor/cores... | 05/15/2012 |
| 8180635 | Weighted sequential variance adaptation with prior knowledge for noise robust speech recognition A method for adapting acoustic models used for automatic speech recognition is provided. The method includes estimating noise in a portion of a speech signal, determining a first estimated variance scaling vector using an estimated 2-order polynomial and the noise e... | 05/15/2012 |
| 8179446 | Video stabilization and reduction of rolling shutter distortion A method of processing a digital video sequence is provided that includes estimating compensated motion parameters and compensated distortion parameters (compensated M/D parameters) of a compensated motion/distortion (M/D) affine transformation for a block of pixels... | 05/15/2012 |
| 8179160 | Input-output (I/O) circuit supporting multiple I/O logic-level swings An integrated circuit (IC) includes an input/output (I/O) circuit supporting high-speed operation and multiple I/O logic-level swings. The I/O circuit includes a first output signal chain to generate outputs with a first logic level swing, and a second output signal... | 05/15/2012 |
| 8178976 | IC device having low resistance TSV comprising ground connection A semiconductor device includes an integrated circuit (IC) die including a substrate, and at least one through substrate via (TSV) that extends through the substrate to a protruding integral tip that includes sidewalls and a distal end. The protruding integral tip h... | 05/15/2012 |
| 8176374 | Data register control of TDI/AX1 to the data register The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG Tap domains. Direct scan access to a selected Tap domain by a JTAG controller is achieved using auxiliary... | 05/08/2012 |
| 8176297 | Adaptive fetch advance control for a low power processor A digital signal processor (DSP) includes an instruction buffer queue (IBQ) with multiple lines, as well as a modifiable fetch advance parameter to specify a fetch advance setting for the IBQ. The DSP also has a control flow module. In response to execution of a pro... | 05/08/2012 |
| 8175147 | Video coding rate control Video encoding (such as H.263, MPEG-4, H.264/AVC) modifies TMN5-type rate control frame skipping and quantization parameter updating according to buffer fullness levels with I-frame initial quantization parameter values depend upon quantization parameter value of pr... | 05/08/2012 |
| 8175021 | Method for transmission of unicast control in broadcast/multicast transmission time intervals Embodiments of the invention provide methods for maximizing the bandwidth utilization in the uplink of a communication system supporting time division multiplexing between unicast and multicast/broadcast communication modes during transmission time intervals in the ... | 05/08/2012 |
| 8174276 | Coaxial four-point probe for low resistance measurements Various exemplary embodiments provide probes, systems and methods for measuring an effective electrical resistance/resistivity with high sensitivity. In one embodiment, the measuring system can include an upper probe set and a similar lower probe set having a sample... | 05/08/2012 |
| 8171361 | Multiplexer Control Circuitry for TAP Domain Selection Circuitry Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that is accessible external to the IC, it is generally preferred to have selectivity on which Tap domain or Tap ... | 05/01/2012 |
| 8171360 | Linking module enable leads connected to plural TAPs A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20). ... | 05/01/2012 |
| 8171359 | Linking module connected to select leads of plural TAPs A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20). ... | 05/01/2012 |
| 8171185 | Electronic device and communication method This invention provides an electronic device that can suppress the undesired influence of signals flowing on the bus as interference on devices connected to the bus. The electronic device has two ports connected to the bus with corresponding physical layer processin... | 05/01/2012 |
| 8170126 | Reference signal structure for OFDM based transmissions A method for transmitting a plurality of sequences across a plurality of bands of a wireless spectrum is described in which a first sequence is produced using a set of reference signal sequences, wherein the set of reference signal sequences comprises at least CAZAC... | 05/01/2012 |
| 8168970 | Die having embedded circuitry with test and test enable circuitry Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die. The added test pads allow a tester to probe and test more circuits w... | 05/01/2012 |
| 8166358 | Test access port with address and command capability The disclosure provides a novel method and apparatus for inputting addresses to devices to select the device TAP for access. Further, the disclosure provides a novel method and apparatus for inputting addresses for selecting device TAPs and for inputting commands fo... | 04/24/2012 |
| 8165199 | Method and apparatus for on-chip voltage controlled oscillator function This invention uses a flying adder frequency synthesis circuit to provide the required frequency adjustments to accommodate the varying encoding density of a MPEG2 video data stream. This invention adjusts the local clock based on the information extracted from the ... | 04/24/2012 |
| 8164515 | Methods and apparatus to locate a wireless device Methods and apparatus to locate a wireless device are described. A disclosed example method includes transmitting a request location message from a first wireless station to a second wireless station to determine a geographic location of a third wireless station, re... | 04/24/2012 |
| 8161337 | Serially connected circuit blocks with TAPs and wrapper enable lead In a first embodiment a TAP of IEEE standard 1149.1 is allowed to commandeer control from a WSP of IEEE standard P1500 such that the P1500 architecture, normally controlled by the WSP, is rendered controllable by the TAP. In a second embodiment (1) the TAP and WSP b... | 04/17/2012 |
| 8160179 | Cross-over compensation by selective inversion A receiver with selective sign inversion which can compensate for cross-over conversion is described. Some inputs may be a differential data inputs; a sign select input; a converter having inputs coupled to the differential data inputs and having first and second ou... | 04/17/2012 |
| 8159377 | System, method, and circuitry for blind timing mismatch estimation of interleaved analog-to-digital converters A timing skew estimation system is disclosed that includes a plurality of interleaved analog-to-digital converter circuits (ADCs), a timing mismatch estimation unit, and a correction unit. The timing mismatch estimation unit calculates a correlation between each of ... | 04/17/2012 |
| 8158460 | Method of forming metallic leadframes having laser-treated surfaces for improved adhesion to polymeric compounds A leadframe for the assembly of a semiconductor chip has regions (112) with an original smooth surface of glossy appearance and regions (113, 114, 210) of a frosty appearance with rough surface contours. The regions of rough surface contours include tw... | 04/17/2012 |
| 8156394 | Selectively accessing test access ports in a multiple test access port environment A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20). ... | 04/10/2012 |
| 8156334 | Public key out-of-band transfer for mutual authentication Methods for key exchange and mutual authentication are provided that allow for inherent authentication and secret key derivation of parties communicating through an unsecured medium. These methods allow for greater security than existing key exchange and authenticat... | 04/10/2012 |
| 8155972 | Seamless audio speed change based on time scale modification This invention involves time-scale modification of audio signals. The invention describes overlap and add time scale modification with variable input and output buffer sizes. Seamless speed change is achieved by keeping track of previously processed data to avoid di... | 04/10/2012 |
| 8155600 | Digital communication using an inexpensive reference crystal Systems and methods for digital communication using an inexpensive reference crystal are described herein. Some illustrative embodiments include a method that includes setting a center frequency of a local oscillator used by a radio frequency (RF) transceiver, seque... | 04/10/2012 |
| 8155217 | Systems and methods for low-complexity MIMO detection with analytical leaf-node prediction Systems and methods for providing multiple-input multiple-output (MIMO) detection, comprising a leaf node predictor for receiving a processed communications stream, computing at least one channel metric corresponding to the communications stream for a given channel ... | 04/10/2012 |
| 8154443 | Method and system for GNSS coexistence A system and method for operating a wireless transmitter and a global navigation satellite (“GNSS”) receiver coexistent in a mobile wireless device. A mobile wireless device includes a GNSS receiver and a wireless networking system. The wireless networking syste... | 04/10/2012 |
| 8154134 | Packaged electronic devices with face-up die having TSV connection to leads and die pad A packaged electronic device includes a leadframe including a die pad, a first, second, and third lead pin surrounding the die pad. An IC die is assembled in a face-up configuration on the lead frame. The IC die includes a substrate having an active top surface and ... | 04/10/2012 |
| 8154117 | High power integrated circuit device having bump pads An integrated circuit (IC) includes a substrate having a semiconducting surface, a first array of devices on and in the semiconducting surface including first and second coacting current conducting nodes, a plurality of layers disposed on the substrate and including... | 04/10/2012 |
| 8154109 | Leadframe having delamination resistant die pad A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery t... | 04/10/2012 |
| 8151995 | Methods and apparatus to prevent mold compound feeder jams in systems to package integrated circuits Methods and apparatus to preventing mold feeder jams in a system to package integrated circuits. An example method includes detecting if a mold compound tablet has a first alignment on a path and removing the mold compound tablet from the path if the mold compound t... | 04/10/2012 |
| 8149938 | Transmission of ACK/NACK bits and their embedding in the CQI reference signal A transmission of information within a wireless cellular network may include a first and second type of information. A subframe is produced that includes a plurality of symbols, wherein at least one symbol is designated as a data symbol and at least one symbol is de... | 04/03/2012 |
| 8149296 | Solid-state image pickup device This invention is a solid-state image pickup device that solves the problem of limited dynamic range in the high luminance region in an image sensor having white pixels. White pixels or yellow pixels and at least red pixels, green pixels or blue pixels are arranged ... | 04/03/2012 |
| 8145962 | TAP interface select circuit with TMS/RCK or RCK lead This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is limited. The bus may be... | 03/27/2012 |
| 8144807 | Crosstalk cancellation in digital subscriber line communications A digital subscriber line (DSL) modem that has a canceller digital filter for cancelling crosstalk and RF interference in a received DSL signal is disclosed. The modem includes common-mode sense circuitry and also differential-mode sense circuitry. Samples of the co... | 03/27/2012 |
| 8144533 | Compensatory memory system A compensatory memory system is described. This memory system substantially improves performance by adapting an associated delay in a way that optimizes circuit performance. ... | 03/27/2012 |
