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Patent No. 6295668

Maternity Beach Chair

A beach chair which can be adapted for a woman who is pregnant and wishes to sunbathe in the prone position.

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Attorney: Blakely, Sokoloff, Taylor and Zafman


Number of patents: 88
Last date: October 25, 2011

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NumberTitleIssue Date
8045629DSL data collection system
Information is sent by a DSL system component using a non-disruptive operational data parameter. One or more bits of the non-disruptive operational data parameter are used to send other information. In some instances the selected parameter will be an unused paramete...
10/25/2011
7876139Semiconductor device and operating method thereof
A delay locked loop (DLL) of a semiconductor device has a relatively small area and low current consumption while having a function of correcting a duty ratio. The semiconductor device includes a split unit configured to receive and split a reference clock to output...
01/25/2011
7589559Current mode circuitry to modulate a common mode voltage
In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a firs...
09/15/2009
7413986Feedforward and feedback control for conditioning of chemical mechanical polishing pad
A method, apparatus and medium of conditioning a planarizing surface includes installing a wafer to be polished in a chemical mechanical polishing (CMP) apparatus having a polishing pad and a conditioning disk, polishing the wafer under a first set of pad conditioni...
08/19/2008
7401066Correlation of end-of-line data mining with process tool data mining
One embodiment of the present invention is a process tool optimization system that includes: (a) a data mining engine that analyzes end-of-line yield data to identify one or more process tools associated with low yield; and (b) in response to output from the analysi...
07/15/2008
7336626Operating time division duplex (TDD) wireless systems in paired spectrum (FDD) allocations
A wireless communication system operates in a combined FDD and TDD mode. During a first time period, data may be transmitted at a first frequency band and received at a second frequency band. During a second time period, data is transmitted at the second frequency b...
02/26/2008
7269782Orthogonal frequency division multiplexing/modulation communication system for improving ability of data transmission and method thereof
An orthogonal frequency division multiplexing (OFDM) communication system and method for improving frequency utilization efficiency. In the system, a Reed-Solomon encoder codes input information data, and outputs a Reed-Solomon block having a second number of Reed-S...
09/11/2007
D522908Gemstone
06/13/2006
7061659Thermally tuned filter having a pre-stressed membrane
A thermally tuned filter having a pre-stressed membrane. The thermally tuned filter includes a handle layer, a dielectric layer positioned proximate to the handle layer, and a device layer positioned proximate to the handle layer. The device layer includes an optica...
06/13/2006
7057895Thermal standoff for close proximity thermal management
A thermal management system is described for cooling an electronic component mounted on a printed circuit board. The thermal management system includes a heat sink coupled to an electronic component generating heat on a primary side of the printed circuit board and ...
06/06/2006
7049234Multiple stage electroless deposition of a metal layer
A multiple stage method of electrolessly depositing a metal layer is presented. This method may have the two main stages of first forming a thin metal layer on a metal surface using an electroless plating solution containing activating agents that are highly reactiv...
05/23/2006
7028299Task-based multiprocessing system
An embodiment of the present invention is a task manager to manage tasks in a multiprocessor system. A task table stores task entries corresponding to tasks executed by at least one processor. A block allocation circuit allocates blocks of the cache memory used by t...
04/11/2006
7000130Method and apparatus for thermal throttling of clocks using localized measures of activity
Thermal throttling control to safely throttle clocks OFF and ON in an integrated circuit. Digital thermal throttling control is provided to gradually throttle a clock's frequency from ON to OFF and from OFF to ON. The gradual throttling can minimize an instantaneous...
02/14/2006
6996591System and method to efficiently approximate the term 2x
The present invention relates to a system and method to efficiently approximate the term 2X. The system includes an approximation apparatus to approximate 2X, wherein X is a real number. The system further includes a memory to store a computer ...
02/07/2006
6994631Swing
A swing has a fixed support structure and a rigid subframe suspended therefrom. The subframe is suspended on a single pivot axis, thereby permitting pendular motion below the support structure. Seats are mounted on the subframe to provide side-by-side and/or face-to...
02/07/2006
6990183Multiple platform voice processing system with optimized resource allocation
A call processing system is disclosed wherein plural platforms are populated with plural voice boards. Each board on the different platforms is populated with different resources, and resources may be allocated from any board and any platform to process calls. In a ...
01/24/2006
6984873Method of forming a stacked device filler
Numerous embodiments of a stacked device filler and a method of formation are disclosed. In one embodiment, a method of forming a stacked device filler comprises forming a material layer between two or more substrates of a stacked device, and causing a reaction in a...
01/10/2006
6984581Structural reinforcement of highly porous low k dielectric films by ILD posts
Highly porous, low-k dielectric materials are mechanically reinforced to enable the use of these low-k materials as interlayer dielectrics in advanced integrated circuits such as those which incorporate highly porous ILD materials in a Cu damascene interconnect tech...
01/10/2006
6985380SRAM with forward body biasing to improve read cell stability
A SRAM memory cell comprising cross-coupled inverters, each cross-coupled inverter comprising a pull-up transistor, where the pull-up transistors are forward body biased during read operations. Forward body biasing improves the read stability of the memory cell. Oth...
01/10/2006
6974738Nonplanar device with stress incorporation layer and method of fabrication
A semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls is formed on an insulating substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls ...
12/13/2005
6974733Double-gate transistor with enhanced carrier mobility
There is disclosed an apparatus including a straining substrate, a device over the substrate including a channel, wherein the straining substrate strains the device in a direction substantially perpendicular to a direction of current flow in the channel. ...
12/13/2005
6975025Semiconductor chip package and method of manufacturing same
A semiconductor chip package, an electronic system, and a method of manufacturing such package. A lower structure includes a lower insulating layer and a metal layer made of separate electrical conductors. A wall defines a cavity on the metal layer. Electrical condu...
12/13/2005
6970939Method and apparatus for large payload distribution in a network
Large payload files are selectively partitioned in blocks and the blocks distributed to a plurality of distribution stations at the edge of the network qualified to have the data. Each qualified station decides how much and what portion of the content to save locall...
11/29/2005
6968410Multi-threaded processing of system management interrupts
An information capturing technique captures information on a processor cycle that results in a high level interrupt, such as an SMI (System Management Interrupt). A memory controller is connected to at least one processor to control a memory in response to instructi...
11/22/2005
6965268Common mode feedback circuit for fully differential two-stage operational amplifiers
An operational amplifier circuit that provides negative feedback and high gain is described. Specifically, the circuit comprises a first gain stage, a second gain stage, a feedback circuit, and a biasing circuit. ...
11/15/2005
6961063Method and apparatus for improved memory management of video images
A novel storage format enabling a method for improved memory management of video images is described. The method includes receiving an image consisting of a plurality of color components. Once received, the plurality of color components is converted to a mixed forma...
11/01/2005
6961847Method and apparatus for controlling execution of speculations in a processor based on monitoring power consumption
In accordance with one embodiment, the invention provides a method comprising monitoring a power consumption of a processor in executing a program while running in a speculative execution mode wherein instructions are speculatively executed; and turning off said spe...
11/01/2005
6961864Method and apparatus for terminating clock signals upon disconnection of clock trace from ground
According to one embodiment, a computer system is disclosed. The computer system includes a first clock receiver, one or more clock traces coupled to the clock generator, and clock generator coupled to the one or more clock traces. The clock generator gates clock si...
11/01/2005
6957317Apparatus and method for facilitating memory data access with generic read/write patterns
An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of a cache hit/cache miss of data requested by the load instruction withi...
10/18/2005
6956922Generating non-integer clock division
A clock divider and method is disclosed for generating an output clock signal having a frequency that is a fractional or integral multiple of a reference clock signal frequency. In one embodiment, the clock divider divides a clock signal by a first divisor in a firs...
10/18/2005
6954829Non-speculative distributed conflict resolution for a cache coherency protocol
A conflict resolution technique provides consistency such that all conflicts can be detected by at least one of the conflicting requestors if each node monitors all requests after that node has made its own request. If a line is in the Exclusive, Modified or Forward...
10/11/2005
6954886Deterministic hardware reset for FRC machine
A processor includes one or more execution cores, each execution core having an associated scan chain to provide data to a set of voltage nodes of the core. A reset module drives a data pattern onto the scan line, responsive to a reset event. The data pattern places...
10/11/2005
6952367Obtaining data mask mapping information
A data mask map may be programmed into a storage device in various ways. In one embodiment, the data mask is hardwired into a selection device to reorder either the data mask bits or the data chunks. In another embodiment, a data mask map is retrieved from a locatio...
10/04/2005
6952694Full regular expression search of network traffic
Methods and apparatuses for regular expression searching are described. A tree structure is generated representing a string of characters. A character from a data stream is compared to a root node of the tree structure. A state machine is activated if the character ...
10/04/2005
6949810Active phase cancellation for power delivery
An apparatus and a method for active phase cancellation for an inductor/capacitor network have been disclosed. One embodiment of the apparatus includes a package and a die mounted on the package. The die comprises circuitry to to substantially cancel resonance betwe...
09/27/2005
6946350Controlled faceting of source/drain regions
Numerous embodiments of a method for highly selective faceting of the S/D regions in a CMOS device are described. In one embodiment, source/drain regions are formed on a substrate. The source/drain regions are wet etched to form faceted regions. A silicon germanium ...
09/20/2005
6948094Method of correcting a machine check error
Processor implementation-specific instructions save a processor state in a system memory and attempt to correct the error. Control is then transferred to processor-independent instructions. Control is returned to the processor implementation-specific instructions wh...
09/20/2005
6941425Method and apparatus for read launch optimizations in memory interconnect
A method and apparatus for the optimization of memory read operations via read launch optimizations in memory interconnect are disclosed. In one embodiment, a write request may be preempted by a read request. ...
09/06/2005
6941484Synthesis of a synchronization clock
A method, system, and device capable of generating one or more clocks internally to detect, sample, and receive synchronous data streams and eliminate the need for corresponding external synchronization clocks for each data stream. One aspect of the clock generator ...
09/06/2005
6941521Method for dynamically generating a user interface from XML-based documents
A method for dynamically generating a graphical user interface (GUI) from XML-based documents. In accordance with the method, visual components or display objects for building a GUI are defined, as well as a layout hierarchy describing layout relationships between t...
09/06/2005
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