Celebrity Inventors
Magician Harry Houdini patented a "Diver's Suit" enabling the wearer to "quickly divest himself of the suit while being submerged and to safely escape and reach the surface of the water."
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7534553 | Method for fabricating semiconductor device A method for fabricating a semiconductor device is provided. The method includes: preparing a substrate defined as active regions and inactive regions and provided with a plurality of conductive patterns; forming a buffer layer over the plurality of conductive patte... | 05/19/2009 |
| 7487513 | Web service archive A computing device may define a virtual interface to provide an interface for a Web service implementation. The computing device may also create a Web service definition to specify a behavior of the defined virtual interface. The computing device may then provide a ... | 02/03/2009 |
| 7463606 | Method for establishing a MIP and performing handoff by a mobile node A method for supporting handoff and preventing data loss in mobile communications networks is provided. The method for a mobile node establishing a mobile Internet protocol (MIP) with at least one or more wireless packet service systems, each of which has a serving ... | 12/09/2008 |
| 7463476 | Capacitor with nanotubes and method for fabricating the same A capacitor with nanotubes and a method for fabricating the same are provided. The capacitor includes: a lower electrode including a patterned conductive layer and a plurality of nanotubes formed on the patterned conductive layer in the shape of whiskers without usi... | 12/09/2008 |
| 7460588 | Digital subscriber line (DSL) state and line profile control Disclosed are systems and methods for evaluating whether to transition operation of a DSL line from a current line profile to one or more target line profiles. For example, in one embodiment, a method provides providing a profile transition matrix, a plurality of th... | 12/02/2008 |
| 7457828 | System and method for synchronizing distributed buffers when committing data to a database A system and method for synchronizing distributed table buffers is disclosed. A node may contain a synch manager and a table buffer having a synch identifier. The synch manager may use the synch identifier to coordinate updates to the table buffer. The updates to th... | 11/25/2008 |
| 7457949 | Network correction security system and method A network correction security system. The network correction security system connected between a network node and a security-related external system, detects attacks on the network node, corrects weak parts of the performance of the network node, collects informatio... | 11/25/2008 |
| 7457288 | Relay multicast system and method for providing efficient group communication service Provided are a relay multicast system and method for providing efficient group communication services. In the relay multicast system, each multicast feeder can make a peer to open connection with multicast feeders in other classes by selecting an optimal multicast f... | 11/25/2008 |
| 7457744 | Method of estimating pitch by using ratio of maximum peak to candidate for maximum of autocorrelation function and device using the method A device and a method for estimating an open-loop pitch in a general speech CODEC are disclosed. The open-loop pitch estimation device includes an autocorrelation function calculation unit which calculates a normalized autocorrelation function from a perceptual weig... | 11/25/2008 |
| 7457277 | System and method for network layer protocol routing in a peer model integrated optical network Embodiments of the invention are generally directed to a system and method of implementing peer model architecture in integrated optical networks. In one embodiment, heterogeneous domains of nodes share a common control plane via routing and signaling adjacencies es... | 11/25/2008 |
| 7453075 | Charged particle beam exposure system A charged particle beam exposure apparatus for transferring a pattern onto a surface of a target, comprising a beam generator comprising a plurality of n changed particle sources, substantially in one plane, each source adapted for generating a charged particle beam... | 11/18/2008 |
| 7453970 | Clock signal selecting apparatus and method that guarantee continuity of output clock signal Provided are a clock signal selecting apparatus and method that can guarantee the continuity of an output clock signal. The clock signal selecting apparatus and method can synchronize the phases of at least two clock signals by continuously controlling the phases of... | 11/18/2008 |
| 7453947 | Apparatus and method for adaptively modulating signal by using layered time-space detector used in mimo system An apparatus for adaptively modulating/demodulating signals in a multi-input multi-output (MIMO) system having a layered time-space architecture detector and a method thereof is disclosed. The apparatus includes: a bit and power allocation information calculator for... | 11/18/2008 |
| 7453380 | Apparatus and method for processing analog signals and outputting digitally converted analog signals using serial bus Provided are an apparatus and method for processing analog monitoring signals by using a serial bus. The apparatus includes a multiplexer receiving at least one analog signal and outputting only one of the at least one analog signal in response to a predetermined co... | 11/18/2008 |
| 7451053 | On die thermal sensor of semiconductor memory device and method thereof An on die thermal sensor (ODTS) includes a thermal sensor for outputting a first comparing voltage by detecting a temperature of the semiconductor memory device; a comparing unit for outputting a trimming code by comparing the first comparing voltage with a second c... | 11/11/2008 |
| 7450751 | Color interpolation method of image sensor A color interpolation method of an image sensor including a pixel array which green, red and blue pixels are arrayed in Bayer pattern is provided. The method includes: calculating a first average value of first values filtered by green pixels on even rows and a seco... | 11/11/2008 |
| 7450525 | Method for discovering topology in Ethernet network Provided is a topology discovery method for an Ethernet network that can effectively discover a physical topology with respect to the Ethernet network of a mesh structure without developing and using a separate control protocol. The topology discovery method in an E... | 11/11/2008 |
| 7450459 | Multi-port memory device There is provided a column repair technology of a semiconductor memory device. The semiconductor memory device includes: a normal bus connection part for transmitting/receiving data between global data buses and local data buses of each bank; a redundant bus connect... | 11/11/2008 |
| 7450453 | Semiconductor memory device and method for driving bit line sense amplifier thereof A semiconductor memory device includes an amplifying unit for amplifying a voltage difference between a bit line pair; a power supply driver for supplying a power to the amplifying unit in response to a second driving signal; a control unit for generating a first dr... | 11/11/2008 |
| 7450439 | Apparatus for generating internal voltage An internal voltage generator according to the present invention stably supplies an internal voltage regardless a level of power voltage input from a source external to a semiconductor memory device. The present invention includes a dead zone controller to generate ... | 11/11/2008 |
| 7450166 | Digital signal processing apparatus in image sensor Disclosed is an apparatus for processing a digital signal in an image sensor. The apparatus includes: a line memory unit for storing an inputted digital signal of red (R), green (G) and blue (B); a kernel generation unit for generating a plurality of kernels after r... | 11/11/2008 |
| 7449936 | Open-loop slew-rate controlled output driver A slew-rate controlled output driver for use in a semiconductor device includes a PVT variation detection unit having a delay line for receiving a reference clock in order to detect a delay amount variation of the delay line determined according to process, voltage ... | 11/11/2008 |
| 7449914 | Semiconductor memory device A semiconductor memory device includes a code channel for outputting a plurality of code signals based on a code control signal inputted from an external source; a termination resistor decoder for decoding a chip selection signal, an on die termination (ODT) control... | 11/11/2008 |
| 7449751 | High voltage operating electrostatic discharge protection device A high voltage operating electrostatic discharge protection device is provided. The high voltage operating electrostatic discharge protection device includes: a first gate structure and a second gate structure disposed on a substrate of a first conductive type with ... | 11/11/2008 |
| 7449682 | System and method for depth profiling and characterization of thin films Characterization of a sample, e.g., a depth profile, may be attained using one or more of the following parameters in an electron spectroscopy method or system. The one or more parameters may include using low ion energy ions for removing material from the sample to... | 11/11/2008 |
| 7449357 | Method for fabricating image sensor using wafer back grinding Provided is a method for fabricating an image sensor using a wafer back grinding process. The method includes: forming a microlens protection layer over a substrate structure including a light sensing device and other associated devices; opening a pad open unit of t... | 11/11/2008 |
| 7448630 | Poker card game An embodiment of the invention is a technique to play a card game. P pocket cards are dealt to each of a plurality of players from a deck of cards having N ranks and four suits. N is different than 13. The P pocket cards are used by the each of the players to form a... | 11/11/2008 |
| 7450442 | Semiconductor memory device with increased domain crossing margin A semiconductor memory device with an increased domain crossing margin is provided. The semiconductor memory device includes: a data input buffer for receiving an external data in response to a driving signal; a DQS input buffer for receiving an external data strobe... | 11/11/2008 |
| 7447787 | Protocol executing system and protocol PDU common data structure converting method for processing protocol PDUS Disclosed is a system and method for expandibly operating protocol PDU (Protocol Data Unit) encoding/decoding blocks communicating with a protocol executing block in the same protocol. With at least two types of protocol PDU encoding/decoding blocks for data communi... | 11/04/2008 |
| 7446053 | Capacitor with nano-composite dielectric layer and method for fabricating the same A capacitor with a nano-composite dielectric layer and a method for fabricating the same are provided. A dielectric layer of a capacitor includes a nano-composite layer formed by mixing X number of different sub-layers, X being a positive integer greater than approx... | 11/04/2008 |
| 7447095 | Multi-port memory device A multi-port memory device having a plurality of ports performing a serial input/output (I/O) communication with external devices, and a plurality of banks performing a parallel I/O communication with the ports through a plurality of global I/O lines. The multi-port... | 11/04/2008 |
| 7443904 | Scrambling system and method for peak power reduction in MC-CDMA, and recording medium for storing corresponding program Disclosed is an MC-CDMA scrambling system and method, and a recording medium for storing a program thereof. A transmitter receives user's bit streams, uses a fixed scrambling code, determined according to the user's orthogonal code combinations or the number of user... | 10/28/2008 |
| 7443760 | Multi-port memory device with serial input/output interface A multi-port memory device includes a plurality of serial I/O data pads; a plurality of parallel I/O data pads; a plurality of first ports for performing a serial I/O data communication with external devices through the serial I/O data pads; a plurality of banks for... | 10/28/2008 |
| 7443861 | Method of controlling upstream data transmission in ethernet PON and apparatus thereof A method of controlling data transmission in an Ethernet passive optical network (EPON) and an apparatus thereof are provided. Transmission permission messages using a mode of bandwidth allocation are queued in a queuing unit according to the types of the transmissi... | 10/28/2008 |
| 7440446 | Voice over packet system using a plurality of digital signal processors and speech processing method therein A voice over packet (VoP) system using a plurality of digital signal processors (DSPs) and a speech processing method are provided. A plurality of first-stage DSPs perform encoding voice signal of calls allocated in advance, among calls from a circuit network, and o... | 10/21/2008 |
| 7439762 | On-die termination circuit An on-die termination circuit includes: a feedback unit for outputting a feedback signal in response to a plurality of code signals corresponding to an input-resistor; a code signal generation unit for generating the plurality of code signals in order for the feedba... | 10/21/2008 |
| 7439104 | Semiconductor device with increased channel length and method for fabricating the same A semiconductor device with an increased channel length and a method for fabricating the same are provided. The semiconductor device includes: a substrate with an active region including a planar active region and a prominence active region formed on the planar acti... | 10/21/2008 |
| 7440700 | Apparatus for testing performance of optical transceiver Provided is an apparatus for testing the performance of an optical transceiver by referencing various performance clocks provided by an OTU2 signal connection transceiver and an STM-64/OC-192 signal. The apparatus for testing performance of an optical transceiver in... | 10/21/2008 |
| 7441156 | Semiconductor memory device having advanced test mode An apparatus for testing an operation of a semiconductor memory device having a plurality of banks in a compress test mode includes an internal address generator for receiving an external bank address and generating internal bank addresses in response to a bank inte... | 10/21/2008 |
| 7440695 | Optical transmission line monitoring system using a gain clamped optical amplifier There are provided a method and system for monitoring an optical transmission line. The system for monitoring the optical transmission line includes: an OTDR (optical time-domain reflectometer) transmitting a monitoring light to an optical transmission line, measuri... | 10/21/2008 |
