...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 5539149 | Radio frequency interference gasket A radio frequency interference (RFI) gasket (10) to be used with a chassis (36) having slot panels for receiving electronic assembly boards therein wherein the RFI gasket comprises a metal bar (12) dimensioned to fit within slots of the the chassis and a ... | 07/23/1996 |
| 5404501 | Fault-tolerant method of communicating between processes in a multi processor system by keeping track of the current node location of messages A method for communicating between processes in a data processing system comprising a plurality of processor hosts each coupled to a network and a plurality of processes resident on different ones of said processor hosts, wherein messages are transmitted ... | 04/04/1995 |
| 5390193 | Test pattern generation A method for generating and simulating test patterns to detect faults (57, 63) in an integrated circuit. The method comprises identifying all nets (27) which can potentially be shorted together. Each potential fault (34, 36, 37, 38, 39) is categorized as ... | 02/14/1995 |
| 5258703 | Temperature compensated voltage regulator having beta compensation A temperature compensated voltage regulator circuit having a first resistor (RX) disposed in the base circuit between two cascaded transistors and a second resistor (RF) coupled between the collector and base of the first of the two ... | 11/02/1993 |
| 5245341 | Video analog-to-digital converter This invention relates to a video analog-to-digital converter (ADC) and to a method of digitizing a video analog signal. The video ADC (2) comprises a clock for providing a clock signal (HZ) which clocks a horizontal line rate, dither generating means (10... | 09/14/1993 |
| 5233508 | DC/DC voltage converting device A DC/DC voltage converting device is obtained for boosting a DC power supply voltage to provide a higher output voltage, comprising soft start circuit 20 for gradually increasing the turning-on duration of transistor 34 in boosting circuit 30; pulse width... | 08/03/1993 |
| 5231320 | CMOS delay line having duty cycle control A delay line having feedback from a control circuit at the output of the delay line controls the delay line duty cycle to within a specified range. The delay line comprises at least one delay unit having control inputs to each delay unit. The output of th... | 07/27/1993 |
| 5204562 | Turn off delay reduction circuit and method A gate driver circuit for switching a MOSFET on and off while reducing the turn off delay of the MOSFET without effecting the turn off slew rate thereof includes a low impedance circuit path between the gate and drain of the MOSFET which is responsive to ... | 04/20/1993 |
| 5198780 | Adjustable gain differential amplifier A differential amplifier avoids gain fluctuations due to process differences and changes in temperature and allows adjustability of the gain and associated frequency characteristics to desired gain values. The amplifier comprises a pair of load transistor... | 03/30/1993 |
| 5192885 | Clamp circuit A clamp circuit is described in which a video signal is capacitively coupled to an amplifier which has enabled and disabled states. An operational amplifier receives the output of the amplifier and a reference voltage and the output of the operational amp... | 03/09/1993 |
| 5155450 | Interface circuit A circuit for interfacing with the outputs of a differential pressure sensor provides a single-ended output voltage translated in voltage level with respect to the differential voltage applied thereto from the sensor while cancelling the common mode offse... | 10/13/1992 |
| 5148061 | ECL to CMOS translation and latch logic circuit A logic circuit that is responsive to applied ECL input logic signals for providing complementary CMOS logic output signals at first and second outputs includes a translation and latch circuit as well as feedback circuitry. The logic circuit includes an i... | 09/15/1992 |
| 5093585 | Current biasing for I2 L circuits A negative feedback loop, including a two collector I2 L gate having one collector returned to the input of the gate and forcing a reference current into the other of the two collectors of the gate, is used to match the current at the collector... | 03/03/1992 |
| 5089769 | Precision current mirror A current mirror having an input and an output, comprises a diode coupled to the input to which an input current is supplied for providing a bias potential thereacross; an output transistor having an emitter, base and collector, said base and said emitter... | 02/18/1992 |
| 5059921 | Amplifier having two operating modes An amplifier having an input and output stage for providing drive current to a load coupled thereto includes circuitry that senses when an input signal is applied to the amplifier and is responsive thereto for providing an enabling signal at an output the... | 10/22/1991 |
| 5059826 | Voltage threshold generator for use in diode load emitter coupled logic circuits A circuit which provides a threshold voltage to a single-ended operated diode load emitter coupled logic circuit includes a transistor having an emitter coupled to an output at which the threshold voltage is produced, a collector coupled to a positive sup... | 10/22/1991 |
| 5059923 | Fractional load current detector A detection circuit including a first and second sensing circuits detects the presence of load current provided by a utilization circuit to which the detection circuit is coupled to provide an output current that is proportional to the load current. A fra... | 10/22/1991 |
| 5057709 | Current threshold detector circuit A dectector circuit responsive to a current suppled to an input thereof provides an output signal when the magnitude of the current exceeds a predetermined threshold level includes a multi-collector transistor having a first one of its collectors connecte... | 10/15/1991 |
| 5049833 | Amplifier stage An integrated amplifier that can be use as a standard cell which includes a differential input stage and an output stage to provide an increased input common mode range. The differential input stage includes a pair of differentially configured PMOS transi... | 09/17/1991 |
| 5038057 | ECL to CMOS logic translator A voltage translator circuit is responsive to applied ECL input signals for providing corresponding CMOS level logic output signals therefrom. The voltage translator circuit includes a pair of substantially identical translator circuits each having an inp... | 08/06/1991 |
| 5029284 | Precision switchable bus terminator circuit An active integrated termination circuit for providing a predetermined impedance at an output includes first and second resistors each having one end of which is commonly connected to the output. A first switching element is coupled between the other end ... | 07/02/1991 |
| 5027016 | Low power transient suppressor circuit A deglitch circuit for suppressing transient signals that appear at an output node includes a bias circuit for providing a bias signal; a transistor having its collector-emitter conduction path coupled in series to the output node and having a base couple... | 06/25/1991 |
| 5012139 | Full wave rectifier/averaging circuit A full wave rectifier/averaging circuit for processing an input signal having a large dynamic range. A rectification circuit is responsive to the input signal for providing a first signal to a current mirror whereby the current mirror provides a second si... | 04/30/1991 |
| 5006736 | Control circuit for rapid gate discharge A single 3-terminal integrated circuit for controlling a switching device provides both control terminal voltage limitation and rapid turn off time. In an alternative embodiment the control circuit is contained in the same package which houses the control... | 04/09/1991 |
| 4999521 | CMOS analog multiplying circuit A CMOS analog multiplying circuit comprising a first transistor (1) having its current electrodes coupled between a first reference voltage line and a first node and its gate electrode coupled to a first input node having, in use, an input voltage such th... | 03/12/1991 |
| 4996448 | Low power peak detector/buffer with fast charge-up time A peak detector circuit that provides a signal at an output terminal which represents the most positive peak voltage level applied at an input terminal. Comparator circuit is coupled to the input terminal and to the output terminal to determine which volt... | 02/26/1991 |
| 4996498 | Common mode compensation for differential integrating filter A filter cell having common mode compensation for use in a differential integrating filter includes a transconductance amplifier that comprises a pair of differentially connected transistors the bases of which are coupled to respective inputs of the filte... | 02/26/1991 |
| 4994736 | Method and structure for extracting lateral PNP transistor basewidth data at wafer probe A method to extract at wafer probe the variation of lateral PNP basewidth of transistors formed in an integrated circuit which uses two lateral PNP devices having different and known basewidths before fabrication of the devices in the integrated circuit a... | 02/19/1991 |
| 4994758 | Alpha enhancement of a transistor using base current feedback to the emitter A circuit for enhancing the alpha of a transistor. A current supplying circuit passes the base current of the transistor through a first and second current mirror for providing current at the emitter of the transistor such that the apparent emitter curren... | 02/19/1991 |
| 4994690 | Split level bus A split level differential bus having first and second signals at first and second lines, respectively, for transmitting data from a typical driver to a typical receiver, includes a first independent voltage source for terminating the first line and a sec... | 02/19/1991 |
| 4990863 | Amplifier output stage An amplifier output stage with minimum circuitry and optimum performance for providing a SAT-to-SAT output voltage signal at an output terminal. The amplifier output stage includes a first transistor having a collector coupled to the output terminal for s... | 02/05/1991 |
| 4980581 | Differential ECL bus tri-state detection receiver A circuit having first and second inputs and first and second outputs includes a differential receiver circuit responsive to the first and second inputs for providing corresponding output logic signals at the first and second outputs. A tri-state detectio... | 12/25/1990 |
| 4980579 | ECL gate having dummy load for substantially reducing skew An active dummy load substantially reduces skews for input signals of a CML or an ECL series gate by generating a selectable capacitance that adjusts the delay time of the output signal in relation to the changing of the input signal to one of two states.... | 12/25/1990 |
| 4980791 | Universal power supply monitor circuit A power supply monitoring circuit for operating in a plurality of modes comprising first and second single input comparators coupled to first and second inputs, respectively, for sensing the voltage levels thereof. A reference circuit for generating a ref... | 12/25/1990 |
| 4977381 | Differential relaxation oscillator A relaxation oscillator is disclosed which includes first and second currents for charging and discharging a capacitor wherein the slew rate of the dynamic voltages developed at the terminals of the capacitor remain substantially constant for each frequen... | 12/11/1990 |
| 4970412 | Comparator circuit A comparator circuit with hysteresis does not require any bias current as long as the input signal applied thereto is less than a lower threshold value of the comparator. The comparator includes a current source for providing a plurality of currents when ... | 11/13/1990 |
| 4968903 | Combinational static CMOS logic circuit A combinational static CMOS logic circuit for providing a plurality of basic two-input logic functions with reduced complexity and integrated circuit area. The combinational static CMOS logic circuit provides either a NAND or an XOR output at a first outp... | 11/06/1990 |
| 4962428 | Multistandard OSD in a TV receiver including display positioning In a TV receiver including multistandard OSD circuitry a method and apparatus for positioning the display including a comparator which compares a predetermined count (position) with a count of the received horizontal frequency to provide delayed horizonta... | 10/09/1990 |
| 4962427 | TV receiver including multistandard OSD A television receiver including a MPU and OSD circuitry on a single chip. The OSD circuitry includes multisystem detection circuitry which counts the number of horizontal lines between vertical flyback pulses to determine the vertical frequency of the rec... | 10/09/1990 |
| 4961045 | Floating output digital to analog converter A digital to analog converter circuit produces an output voltage which includes a small error voltage floating on a larger direct current voltage component. The circuit includes a controlled current supply coupled to the emitter of an NPN transistor to wh... | 10/02/1990 |