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| Number | Title | Issue Date |
| 5955874 | Supply voltage-independent reference voltage circuit A reference voltage circuit is disclosed that is independent of the voltage supply as well as substantially insensitive to process and temperature variations. The reference voltage circuit includes an intrinsic transistor circuit which includes a pluralit... | 09/21/1999 |
| 5834950 | Phase detector which eliminates frequency ripple A phase detector is disclosed that eliminates frequency ripple in a phase-locked loop circuit. The detector includes first and second circuits for providing UP and DOWN signals respectively. It also includes a delay element for setting the duration of the... | 11/10/1998 |
| 5761453 | Method and system for increasing the throughput of serial data in a computer system A method and system provides for increasing the throughput of serial data in a computer system when a data packet is of unknown length. The method and system includes initializing a first count register to count a length field of the data packet, the leng... | 06/02/1998 |
| 5748525 | Array cell circuit with split read/write line A cell array circuit for a programmable logic device is provided with split read and write lines in the memory cell. The circuit eliminates the need for pass gates in the speed path. The circuit includes steering logic, a row line driver circuit and a row... | 05/05/1998 |
| 5745379 | Method for the production and transmission of enhanced multimedia information An optimization method is disclosed that enhances the interactivity of multimedia information. The optimization method includes separating a multimedia information into primary and secondary layers and enhancing that information in the primary layers such... | 04/28/1998 |
| 5693972 | Method and system for protecting a stacked gate edge in a semiconductor device from self-aligned source (sas) etch in a semiconductor device A process for protecting the stacked gate edge of a semiconductor device is disclosed. The process provides for providing a spacer formation before the self aligned source (SAS) etch is accomplished. By providing the spacer formation prior to the SAS etch... | 12/02/1997 |
| 5689677 | Circuit for enhancing performance of a computer for personal use A circuit for modifying an instruction stream comprises a first logic circuit capable of issuing instructions and a second logic circuit means responding to the instructions. The circuit also includes a dynamic memory circuit which is responsive to the fi... | 11/18/1997 |
| 5689472 | System and method for providing efficient access to a memory bank Apparatus, method, and system aspects for providing efficient accesses to memory in a computer system, the computer system including a controller, are described. Included in the aspects are a random access memory array having a plurality of rows and colum... | 11/18/1997 |
| 5689334 | Intracavity laser spectroscope for high sensitivity detection of contaminants Contaminants are detected optically at concentrations below 1 part-per-million (ppm) and extending to a level approaching 1 part-per-trillion (ppt) by using intracavity laser spectroscopy (ILS) techniques. A solid-state laser with an ion-doped crystal med... | 11/18/1997 |
| 5684513 | Electronic luminescence keyboard system for a portable device An electronic luminescence keyboard system in a portable device which includes a plurality of keypads and an illuminated panel which displays information responsive to the pressing of at least one of the plurality of keypads is disclosed. The improvement ... | 11/04/1997 |
| 5684366 | Lamp protection device A lamp protection device includes a circuit to prevent a lamp from being switched on at full line voltage and which provides for the gradual heating of the filament to reduce the expansion rate of the filament. The circuit is connected to a switched alter... | 11/04/1997 |
| 5680348 | Power supply independent current source for FLASH EPROM erasure A system and method for providing a constant electric field that is insensitive to fluctuations in the power supply to a FLASH EPROM during erasure. The system comprises a plurality of sector source drivers and a power supply insensitive constant current ... | 10/21/1997 |
| 5675273 | Clock regulator with precision midcycle edge timing A clock edge regulator that adds precision midcycle edge timing to an existing clock distribution. Two phase detector and phase delay pairs regulate the rising and falling clock edges. The falling edge is regulated to a precision time interval division of... | 10/07/1997 |
| 5665641 | Method to prevent formation of defects during multilayer interconnect processing A process is provided for forming a hard mask over an aluminum-containing layer for patterning and etching the aluminum-containing layer to define interconnects. The process comprises depositing the material comprising the hard mask at a temperature that ... | 09/09/1997 |
| 5661829 | Optical isolator A system and method for providing an optical isolator comprising a first collimating means, a core, and a second collimating means is disclosed. The first collimating means comprises at least a first optical fiber holder, a first lens, and a first collima... | 08/26/1997 |
| 5661577 | Incoherent/coherent double angularly multiplexed volume holographic optical elements Novel multiplexed volume holographic optical elements for the development of highly multiplexed photonic interconnection and holographic memory systems with maximum optical throughput efficiency and minimum crosstalk, based on parallel incoherent/coherent... | 08/26/1997 |
| 5658440 | Surface image transfer etching A process called surface image transfer etching (SITE) is used to etch patterned photoresist so as to more completely transfer a well-defined pattern formed in the top surface (10a) of a material to the bulk of the material (12). The process uses no mask,... | 08/19/1997 |
| 5656509 | Method and test structure for determining gouging in a flash EPROM cell during SAS etch In one aspect of the present invention, a method includes the steps of providing a first test cell electrically isolated from the substrate, unexposed to the SAS etch and having a first core profile. The method further includes providing a second test cel... | 08/12/1997 |
| 5654985 | Address tracking over repeater based networks A system is provided for use in a network to provide authentication of packets of data, provide security to ensure the prevention of unauthorized receipt of data, to provide improved monitoring of the packets of data transmitted and received over such a n... | 08/05/1997 |
| 5654589 | Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application The present invention is directed to a technology that simplifies the process of fabricating multilayer interconnects and reduces capacitance in integrated circuits employing multilayer interconnects. The novel landing pad technology of the present invent... | 08/05/1997 |
| 5652531 | Phase detector which eliminates frequency ripple A phase detector is disclosed that eliminates frequency ripple in a phase-locked loop circuit. The detector includes first and second circuits for providing UP and DOWN signals respectively. It also includes a delay element for setting the duration of the... | 07/29/1997 |
| 5652155 | Method for making semiconductor circuit including non-ESD transistors with reduced degradation due to an impurity implant A method for reducing encroachment of an impurity implant into a channel region in a non-ESD transistor in a semiconductor circuit, the non-ESD transistor receiving both first and second implant dopants, and the circuit including a plurality of ESD transi... | 07/29/1997 |
| 5652015 | Process for fabricating an arbitrary pattern write head An arbitrary pattern write head assembly for writing timing-based servo patterns on magnetic storage media is provided, comprising: (a) a first pole piece comprising a substrate comprising a magnetic material, said substrate having a major surface; (b) a ... | 07/29/1997 |
| 5650651 | Plasma damage reduction device for sub-half micron technology An improved transistor structure. The novel transistor structure includes a substrate, at least one source disposed on the substrate; at least one drain disposed on the substrate; and at least one gate disposed on the substrate between the source and the ... | 07/22/1997 |
| 5643256 | Gold-plated electrosurgical instrument An electrosurgical instrument and method for making and using the same is provided. The electrosurgical instrument includes a stainless steel blade whose surface is plated with an intermediate layer comprising a substantially non-toxic metal having a hard... | 07/01/1997 |
| 5640594 | Method and system for assigning peripheral device addresses A system for relocating expansion cards within a personal computer is provided that eliminates the need for manually changing the address locations. By examining both the address and the data of I/O accesses, the system provides security against accidenta... | 06/17/1997 |
| 5639996 | Asymmetrically resonance tuned speaker-box An asymmetrically resonance speaker enclosure is disclosed. Each side of the speaker box is reinforced asymmetrically, ensuring that each side has different resonance characteristics. Thus, the peak in the speaker box resonance is spread out, thereby redu... | 06/17/1997 |
| 5638426 | Interactive system for a closed cable network A system is provided that enhances the interactivity of multimedia information in a closed cable network such as a hotel system or the like. The system includes a multimedia processing system, a telephone switching system, a video control system, a servic... | 06/10/1997 |
| 5638083 | System for allowing synchronous sleep mode operation within a computer A system is provided that allows for the synchronous operation of a memory controller within a computer when the local bus clock has become inactive for a predetermined period of time. The system includes a circuit that senses the presence of the local bu... | 06/10/1997 |
| 5636428 | Dado cutting blade arrangement A blade arrangement for cutting dados that includes magnetic dado spacers, which firmly adhere through magnetic attraction to the dado blades, is disclosed. Also, with the blade arrangement of the present invention, problems due to blade vibrations are re... | 06/10/1997 |
| 5636140 | System and method for a flexible MAC layer interface in a wireless local area network A system and method for providing a flexible medium access control device. The medium access control (MAC) device includes four configurable transmit and receive modes for communicating with a physical layer signaling control device. The four modes are co... | 06/03/1997 |
| 5635737 | Symmetrical multi-layer metal logic array with extension portions for increased gate density and a testability area A gate array architecture is disclosed that utilizes significantly less silicon area than the prior art. The core cell includes a four transistor arrangement in which a substrate tap is located adjacent to the transistor pair. This provides for a more "sy... | 06/03/1997 |
| 5633687 | Method and system for providing an interlaced image on an display A system and method for removing motion artifacts from an interlaced image is disclosed. The interlaced image comprises an odd and an even field. The system and method includes providing one of the odd and the even fields on every other line of the displa... | 05/27/1997 |
| 5630857 | Process for manufacturing GRIN lenses by melting a series of layers of frits A method of manufacturing an optical device having a profile of refractive indices along its optical axis. A desired volume of each of a plurality of types of optical material are dispensed into a mold of known plan area in the form of a frit or a melt an... | 05/20/1997 |
| 5629893 | System for constant field erasure in a flash EPROM A FLASH EPROM cell in accordance with the present invention is disclosed in which the erasure is accomplished under a constant electric field. The FLASH EPROM cell includes a semiconductor device including a source, a drain and a gate and a constant curre... | 05/13/1997 |
| 5628075 | Portable vertically adjustable lavatory assembly A portable vertically adjustable lavatory assembly includes a box member. Inside the box member is a vertically movable platform positioned and has a lavatory connected thereto. A lavatory is positioned outside of the box member and includes a sink portio... | 05/13/1997 |
| 5625231 | Low cost solution to high aspect ratio contact/via adhesion layer application for deep sub-half micrometer back-end-of line technology A process for applying a TiN contact/via adhesion layer to high aspect ratio contact/via openings etched in a dielectric comprises providing a first layer of TiN on the bottom of the contact/via openings and then depositing the second layer of TiN on the ... | 04/29/1997 |
| 5624859 | Method for providing device isolation and off-state leakage current for a semiconductor device A method and system for providing a semiconductor device with device isolation and leakage current control which entails processing a semiconductor substrate to form a semiconductor circuit, and providing at least one high energy implant on the semiconduc... | 04/29/1997 |
| 5622385 | Wraparound cover for a paperback book A removable, reusable, wrap-around cover for a paperback book consisting of a single sheet of semi-rigid synthetic plastic material, vertically scored with multiple lines to allow it to fit around varying thickness of book, with two pairs of flaps on each... | 04/22/1997 |
| 5619441 | High speed dynamic binary incrementer A high speed dynamic binary incrementer is provided that requires only two stages regardless of the bit width of the incrementer. The binary incrementer utilizes the inverse of logical carry expressions to provide for a first stage. A sum stage receives t... | 04/08/1997 |
