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| Number | Title | Issue Date |
| 6185532 | Digital broadcast system with selection of items at each receiver via individual user profiles and voice readout of selected items A communications system includes a single transmitter and a large number of individual receivers. The transmitter broadcasts a signal over a medium a continuous stream of digitally coded text items, each carrying information as to one or more subjects des... | 02/06/2001 |
| 5469436 | Polling-type digital communications system having pseudo-balanced mode A large communications network is linked to a primary terminal and a secondary terminal. The primary polls the secondary whenever it has data to send, and need not poll at any maximum fixed interval. The poll operation sends a sequence of data frames to t... | 11/21/1995 |
| 5450416 | Apparatus and method for testing multifunction communications networks An improved apparatus and method for isolating faults in a complex communications network such as a collision-detection network. A wrap plug connected to a communications adapter of a computer system simulates multiple functions of the network environment... | 09/12/1995 |
| 5437014 | System for supporting mouse button events of dependent workstation terminals connected to main processor executing multiple application programs A dependent, nonprogrammable, character-based workstation terminal (DWS) supports a mouse. A terminal controller entirely within the DWS processes and displays mouse motions, but sends mouse button actuations, with the current mouse position, to a single ... | 07/25/1995 |
| 5420893 | Asynchronous data channel for information storage subsystem An asynchronous data channel for a disk drive reads fields of data synchronized at a bit frequency which are separated by adjustment regions having two different patterns of control signals. Each pattern repeats at a different submultiple of the bit frequ... | 05/30/1995 |
| 5419483 | Method and apparatus for manufacturing a printed circuit card and connector assembly Assembling a circuit card to a straddle mount connector with improved alignment. A holder using a parallel linkage holds the card parallel to the connector despite thickness variations, during solder bonding.... | 05/30/1995 |
| 5396130 | Method and apparatus for adaptive chip trim adjustment A method and apparatus are provided for adaptive chip trim adjustment for an integrated circuit. A plurality of switching devices have an unswitched state and a switched state. The unswitched state corresponds to one binary value, and the switched state c... | 03/07/1995 |
| 5333297 | Multiprocessor system having multiple classes of instructions for purposes of mutual interruptibility A computer system in which each of certain critical instructions, all performing multiple main storage accesses to shared data, have the appearance of executing required main storage accesses atomically with respect to a predefined set or class of instruc... | 07/26/1994 |
| 5329428 | High-density packaging for multiple removable electronics subassemblies Packaging for an electronics assembly. A base card has a row of elongated slots. A number of individually insertable subassemblies have standoff feet and a pair of offset hooks at their sides. The hooks snap into the slots in such a way that each slot can... | 07/12/1994 |
| 5318212 | Method and apparatus for manufacturing a printed circuit card and connector assembly Assembling a circuit card to a straddle mount connector with improved alignment. A holder using a parallel linkage holds the card parallel to the connector despite thickness variations, during solder bonding.... | 06/07/1994 |
| 5299393 | Slurry containment device for polishing semiconductor wafers Liquid abrasive slurry for chemical-mechanical polishing of semiconductor wafers is held on a rotating polish table by a containment device having two continuous circular bonded strips of differing flexibilities. A releasable clamp seals the entire length... | 04/05/1994 |
| 5279926 | Method and apparatus for removing vapor from a pressurized sprayed liquid in the manufacture of semiconductor integrated circuits Pressurized liquid solvent is dispensed on specific areas of a semiconductor wafer. A vented accumulator removes bubbles introduced by an upstream needle valve. The accumulator outlet leads directly to a dispensing tip, without further pressure drop.... | 01/18/1994 |
| 5204866 | Bidirectional free-space optical bus for electronics systems An electronics system communicates among its subsystems by a free-space optical bus. The bus transmits signals bidirectionally along a single linear axis as polarized beams of light. Each subsystem has a bus interface unit for generating outgoing beams al... | 04/20/1993 |
| 5168571 | System for aligning bytes of variable multi-bytes length operand based on alu byte length and a number of unprocessed byte data A hardware data string operation controller is provided which (1) performs variable length main store string operation; (2) executes at least a subset of both left to right and right to left instructions, having variable length multibyte operands; and (3)... | 12/01/1992 |
| 5133066 | Method for selecting multiple versions of data in a reduced record units text editing system A text document is stored as a sequence of primary records linked by a table. When an operator changes one of the records, the changed text is stored as a secondary record associated with a primary record in the table. If the operator later chooses to und... | 07/21/1992 |
| 5124571 | Data processing system having four phase clocks generated separately on each processor chip A digital system generates a single-phase master clock and distributes it to multiple cards and chips incorporating the functional logic of the system. A circuit in each chip divides the single clock into four spaced clock phases at the same frequency as ... | 06/23/1992 |
| 5113403 | Bidirectional free-space optical bus for electronics systems An electronics system communicates among its subsystems by a free-space optical bus. The bus transmits signals bidirectionally along a single linear axis as polarized beams of light. Each subsystem has a bus interface unit for generating outgoing beams al... | 05/12/1992 |
| 5093908 | Method and apparatus for executing instructions in a single sequential instruction stream in a main processor and a coprocessor A tightly-coupled main processor and coprocessor overlap the execution of sequential instructions when apparent sequential operation and precise exception interrupts can be assured. Logic detects all conditions under which these criteria might potentially... | 03/03/1992 |
| 5077676 | Reducing clock skew in large-scale integrated circuits In a system of digital chips, the time delay in all clock trees is equalized by equalizing the delay through each level of all trees. The level delays are equalized by adjusting the capacitance of terminators in each net at each level, and/or by adjusting... | 12/31/1991 |
| 5069522 | Optical fiber link card An optical fiber link card communication module, and process for fabricating the module, where the module provides a parallel electrical interface to the user, facilitates high speed serial transmission of data over an optical data link, and contains a pl... | 12/03/1991 |
| 4992972 | Flexible context searchable on-line information system with help files and modules for on-line computer system documentation On-line documentation for an application program resides in a number of help modules. A display file for the application program specifies command panels to be displayed. The command panel definition includes a mapping of screen areas to help modules as w... | 02/12/1991 |
| 4975868 | Floating-point processor having pre-adjusted exponent bias for multiplication and division A floating-point arithmetic unit includes an exponent unit for biased exponents. Combinatorial bias-adjust logic removes the bias from one operand exponent before the two operand exponents are added together in adder for a multiply operation, and inserts ... | 12/04/1990 |
| 4970678 | System for providing context-sensitive on-line documentation in a data processor A word processor prepares a document having internal labels in the text. An application program contains a routine executable at various points for accessing the document and displaying its text at the label locations determined by the current position in... | 11/13/1990 |
| 4965720 | Directed address generation for virtual-address data processors In a processor having a real address space larger than its virtual address space, all of the physical memory is addressed by using a separate prefix register associated with each of the address registers to hold both a high-order address portion and a con... | 10/23/1990 |
| 4964107 | Relative timing precompensation of high-speed pulse signals for digital magnetic recoding A circuit for a partial-response, maximum likelihood (PRML) magnetic recording channel stretches and shrinks pulses in particular write-data sequences. The circuit maintains precise tracking in the delays among multiple signals by sending them through the... | 10/16/1990 |
| 4949300 | Sharing word-processing functions among multiple processors A central processor holds a word-processing program and an entire document to be processed. A personal computer or intelligent terminal has an interactive display and holds code for some functions of the word processor, and stores individual pages of the ... | 08/14/1990 |
| 4942399 | Adaptive flash analog/digital converter for differential input signal A differential analog input signal is level-shifted and converted to single-ended form. Its average value is compared to the midpoint of a set of reference voltages. A control signal proportional to the average value forces the average of the single-ended... | 07/17/1990 |
| 4939389 | VLSI performance compensation for off-chip drivers and clock generation A performance-sensing element (PSE) circuit detects the actual speed of other circuits on the same chip by launching a pulse into a tapped cascade of circuits on the chip, then detecting how far the pulse has progressed after a known interval. Control sig... | 07/03/1990 |
| 4902916 | Identification of defects in emitter-coupled logic circuits An ECL logic circuit uses a single resistor in place of separate current-source and emitter-follower resistors. A single tap connects a point on this resistor to the ground bus, and the signal-output line connects to this resistor by a contact which is se... | 02/20/1990 |
| 4899274 | Dynamic terminal address allocation by the terminal itself in a data processing system A system has a central processor and multiple addressable terminals connected by a communication cable. The terminal itself contains a list of candidate addresses it can use. The terminal determines which of the candidate addresses are already in use by o... | 02/06/1990 |
| 4817186 | Locating individual images in a field for recognition or the like A field of scanned video pels is first broken up into cells representing small portions of characters to be recognized, according to a first set of logics. A second set of logics then recombines the cells into blocks containing individual characters separ... | 03/28/1989 |
| 4815983 | Customizable plugs for A.C. power cords A modular power-line attachment cord has a plug with standard pins in a cavity with a locking shoulder. A number of national-standard inserts have cooperating sockets for the pins, and a locking shoulder allowing the insert to be permanently captured in t... | 03/28/1989 |
| 4792704 | Scaled voltage level translator circuit A circular translates an input signal about an input reference voltage to an output signal referenced to a different voltage. The input signal may be scaled, and multiple inputs may be scaled independently and summed. Shift networks transfer the input sig... | 12/20/1988 |
| 4791524 | Electrostatic discharge protection for electronic packages A circuit card has a conductive bracket (or frame or cover) which contacts the conductive frame (or cage or enclosure) of an assembly before the circuit can electrically connect to a bus or other circuit in the assembly. A high-value resistor between circ... | 12/13/1988 |
| 4746966 | Logic-circuit layout for large-scale integrated circuits A VLSI chip has multiple annular rings of circuit cells, interspersed with annular wiring channels for interconecting the cells. Another wiring layer runs perpendicular to the rings. A central chip area contains all the I/O connections for the chip.... | 05/24/1988 |
| 4745570 | Binary multibit multiplier A digital multiplier has recoders for recoding the multiplier bits to form selection bits which are applied to selectors for selecting forms of the multiplicand, either the multiplicand itself or multiples of the multiplicand, the selected forms being app... | 05/17/1988 |
| 4742383 | Multi-function FET masterslice cell A cell layout provides a practical masterslice design for random logic in any LSI FET technology. Each cell is capable of the order of about 20 different functions at any of several different power levels. Multiple cells can be combined to form standard m... | 05/03/1988 |
| 4731643 | Logic-circuit layout for large-scale integrated circuits A VLSI chip has multiple annular rings of circuit cells, interspersed with annular wiring channels for interconnecting the cells. Another wiring layer runs perpendicular to the rings. A central chip area contains all the I/O connections for the chip.... | 03/15/1988 |
| 4709328 | Composite data-processing system using multiple standalone processing systems Two different data-processing systems are interconnected into a composite system by a shared memory in the address space of each, and by a virtual channel which generates interrupts so that each system can control the other. Each system can execute standa... | 11/24/1987 |
| 4698599 | Differential summing amplifier for inputs having large common mode signals Differential input voltages are converted into current unbalances in a parallel-branch circuit. A load means converts the sum of the current unbalances to a differential voltage representing the sum of the input voltages.... | 10/06/1987 |
