Bizarre Patents
Mouthguard made at least partially from an edible candy
A mouthguard includes a U-shaped upper bite plate which removably fits over upper teeth of a person, with the entire upper bite plate being made from a soft, deformable and edible gummi candy.
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| Number | Title | Issue Date |
| 7627804 | Memory device with speculative commands to memory core In some embodiments, a chip includes a memory core, error detection circuitry, and a control unit. The error detection circuitry determines the validity of error detection signals associated with speculative and non-speculative commands received by the chip and to p... | 12/01/2009 |
| 7627706 | Creation of logical APIC ID with cluster ID and intra-cluster ID In some embodiments, an apparatus includes logical interrupt identification number creation logic to receive physical processor identification numbers and create logical processor identification numbers through using the physical processor identification numbers. Ea... | 12/01/2009 |
| 7519891 | IO self test method and apparatus for memory A memory includes a data generator to generate a data pattern, a transmitter in communication with the data generator, the transmitter to transmit the data pattern as a test data pattern, receiver to receive the test data pattern from the transmitter, and a comparat... | 04/14/2009 |
| 7496706 | Message signaled interrupt redirection table In some embodiments, the inventions include a chip having a message signaled interrupt redirection table (MRT) that contains entries including an address field and a data field. The chip also includes translation circuitry to translate an address field and a data fi... | 02/24/2009 |
| 7479777 | Circuitry and method to measure a duty cycle of a clock signal In some embodiments, a chip includes clock generation circuitry to create a clock signal, and reference signal oscillator circuitry to produce a reference signal with a higher frequency than the clock signal. The chip includes a counter to change a count value in re... | 01/20/2009 |
| 7433992 | Command controlling different operations in different chips In some embodiments, the invention includes a chip having a register to include an operation type signal. The chip also includes control circuitry to receive a first command and in response to the first command to cause the chip to perform a first operation if the o... | 10/07/2008 |
| 7427872 | Asynchronous coupling and decoupling of chips In some embodiments, a chip includes first and second nodes, a variable voltage source, and transmitter and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structures coupled between the firs... | 09/23/2008 |
| 7363517 | Methods and apparatus to manage system power and performance A current level of power consumption of a system is monitored by a power consumption controller. When the current level of power consumption exceeds power guidelines, the power consumption controller adjusts the power consumption of one or more components in the sys... | 04/22/2008 |
| 7349233 | Memory device with read data from different banks In some embodiments, a chip includes at least four groups of memory banks and at least four groups of output conductors wherein each group of output conductors corresponds to a different one of the groups of memory banks. The chip also includes circuitry to perform ... | 03/25/2008 |
| 7324458 | Physical layer loopback In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband ... | 01/29/2008 |
| 7309866 | Cosmic ray detectors for integrated circuit chips A cosmic ray detector includes a cantilever with a first tip. The detector also includes a second tip and circuitry to provide a signal indicative of a distance between the first and second tips being such as would be caused by a cosmic ray interaction event. ... | 12/18/2007 |
| 7308025 | Transmitters providing cycle encoded signals In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the en... | 12/11/2007 |
| 7305023 | Receivers for cycle encoded signals In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the en... | 12/04/2007 |
| 7269088 | Identical chips with different operations in a system In some embodiments, a chip includes a memory core, control circuitry, and first ports, second ports, and third ports. The first ports are to only receive signals, the second ports are to only provide signals, and the control circuitry is to control whether the thir... | 09/11/2007 |
| 7161388 | Remote receiver detection In some embodiments, a chip includes first and second nodes, a variable voltage source, a transmitter, change detection circuitry, and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structur... | 01/09/2007 |
| 7130229 | Interleaved mirrored memory systems In some embodiments, a system includes a first memory assembly coupled to a first channel and a second memory assembly coupled to a second channel. The system includes a memory controller to write first and second primary data sections to the first and second memory... | 10/31/2006 |
| 7076618 | Memory controllers with interleaved mirrored memory modes In some embodiments, a memory controller includes first and second memory channel interfaces and memory access control circuitry. The memory access control circuitry is to send first and second primary data sections to the first and second memory channel interfaces,... | 07/11/2006 |
| 7043667 | Debug information provided through tag space In some embodiments, the invention includes a device and bus transaction control circuitry to provide bus transactions with tag space, wherein under some conditions at least part of the tag space is used to provide debug information and under some conditions at leas... | 05/09/2006 |
| 7031221 | Fixed phase clock and strobe signals in daisy chained chips In some embodiments, a chip includes first and second ports to provide first and second received data signals and first and second received strobe signal, respectively. An internal clock signal has a fixed phase relationship to the first received strobe signal and t... | 04/18/2006 |
| 7017017 | Memory controllers with interleaved mirrored memory modes In some embodiments, a memory controller includes first and second memory channel interfaces and memory access control circuitry. The memory access control circuitry is to send first and second primary data sections to the first and second memory channel interfaces,... | 03/21/2006 |
| 6959364 | Partially inclusive snoop filter In some embodiments, the invention includes a snoop filter, wherein entries in the snoop filter are allocated in response to initial accesses of local cache lines by a remote node, but entries in the snoop filter are not allocated in response to accesses of the loca... | 10/25/2005 |
| 6937679 | Spread spectrum clocking tolerant receivers In some embodiments, the invention includes a system having a clock recovery circuitry to receive a data signal and a reference clock signal and in response thereto to produce an in phase clock signal which is in phase with the data signal and mirrors frequency chan... | 08/30/2005 |
| 6918078 | Systems with modules sharing terminations In some embodiments, the invention includes a system having first, second, third and fourth modules; and a circuit board including first, second, third, and fourth module connectors to receive the first and second modules, respectively. The system includes among oth... | 07/12/2005 |
| 6906549 | Asynchronous coupling and decoupling of chips In some embodiments, a chip includes first and second nodes, a variable voltage source, and transmitter and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structures coupled between the firs... | 06/14/2005 |
| 6847617 | Systems for interchip communication In some embodiments, the invention involves a system having a first group of integrated circuits connected in a truncated ring fashion, wherein the truncated ring includes a truncated region to allow for additional integrated circuits to be added to the ring. In som... | 01/25/2005 |
| 6828638 | Decoupling capacitors for thin gate oxides In some embodiments, the invention involves a die having a first conductor carrying a power supply voltage and a second conductor carrying a ground voltage. A semiconductor capacitor operating in depletion mode is coupled between the first and second conductors to p... | 12/07/2004 |
| 6825693 | Remote receiver detection In some embodiments, a chip includes first and second nodes, a variable voltage source, a transmitter, change detection circuitry, and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structur... | 11/30/2004 |
| 6795899 | Memory system with burst length shorter than prefetch length In some embodiments, the invention includes a system having a memory controller, a bus, and first and second memory devices. The memory controller requests read and write operations and operates with a burst length. The first and second memory devices are coupled to... | 09/21/2004 |
| 6771515 | Systems having modules with on die terminations In some embodiments, the invention includes a system having first and second modules and a circuit board including first and second module connectors to receive the first and second modules, respectively. A first path of conductors extends from the circuit board to ... | 08/03/2004 |
| 6772324 | Processor having multiple program counters and trace buffers outside an execution pipeline In one embodiment of the invention, a processor includes an execution pipeline to concurrently execute at least portions of threads, wherein at least one of the threads is dependent on at least another one of the threads. The processor also includes detection circui... | 08/03/2004 |
| 6747474 | Integrated circuit stubs in a point-to-point system In some embodiments, the invention involves multiple integrated circuit stubs coupled in series. At least one of the integrated circuit stubs including first conductors to receive signals from a first adjacent one of the integrated circuit stubs, second conductors t... | 06/08/2004 |
| 6734498 | Insulated channel field effect transistor with an electric field terminal region In one embodiment, the invention includes a field effect transistor having a substrate, a source, and a drain. An electric field terminal region is lower than the source and drain and is in the substrate. A body is above the electric field terminal region between th... | 05/11/2004 |
| 6724082 | Systems having modules with selectable on die terminations In some embodiments, the invention includes a system having first and second modules; and a circuit board including first and second module connectors to receive the first and second modules, respectively. A first path of conductors extending from the circuit board ... | 04/20/2004 |
| 6717823 | Systems having modules with buffer chips In some embodiments, the invention includes a system having first and second modules, the first module having a first group of chips and the second module having a second group of chips, and a circuit board including first and second module connectors to receive the... | 04/06/2004 |
| 6711027 | Modules having paths of different impedances In some embodiments, the invention includes a module including a circuit board and first and second groups of conductors supported by the circuit board. A first group of chips each include on die terminations that are enabled. At least some of a second group of chip... | 03/23/2004 |
| 6700457 | Impedance compensation for circuit board breakout region In some embodiments, the invention includes system comprising a circuit board including a circuit board trace. This system includes a packaged chip supported by the circuit board including, the packaged chip having a package, wherein the circuit board tra... | 03/02/2004 |
| 6674649 | Systems having modules sharing on module terminations In some embodiments, the invention includes a system having first and second modules and a circuit board including first and second module connectors to receive the first and second modules, respectively. The system includes a first path of conductors ext... | 01/06/2004 |
| 6674648 | Termination cards and systems therefore In some embodiments, the invention includes a termination card having a substrate having groups of fingers on a first side of the substrate and groups of fingers on a second side of the substrate and wherein some of the groups of fingers on the first side... | 01/06/2004 |
| 6631083 | Systems with modules and clocking therefore In some embodiments, the invention includes a system having first and second modules; and a circuit board including first and second module connectors to receive the first and second modules, respectively. The system also includes a first clock path of co... | 10/07/2003 |
| 6617892 | Single ended interconnect systems In some embodiments, the invention includes an interconnect system having a single ended driver and a single ended hysteretic receiver. A single ended interconnect is coupled between the single ended driver and single ended receiver. In other embodiments,... | 09/09/2003 |
