Quotables
"To place a man in a multi-stage rocket and project him into the controlling gravitational field of the moon where the passengers can make scientific observations, perhaps land alive, and then return to earth--all that constitutes a wild dream worthy of Jules Verne. I am bold enough to say that such a man-made voyage will never occur regardless of all future advances."
Lee deForest, American radio pioneer ; 1957
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| Application No. | Application Title | Issue Date |
| 20110047320 | SYSTEM AND METHOD FOR PERFORMING PROGRAM OPERATION ON NONVOLATILE MEMORY DEVICE A data processing system performs a data processing method by receiving and interpreting a command packet corresponding to a program operation, identifying a size of data to be programmed in the program operation, and programming the data using a buffered or un-buffered... | 02/24/2011 |
| 20110044123 | CIRCUIT AND METHODS FOR ELIMINATING SKEW BETWEEN SIGNALS IN SEMICODUCTOR INTEGRATED CIRCUIT A circuit for eliminating a skew between data and a clock signal in an interface between a semiconductor memory device and a memory controller includes an edge information storage unit which stores edge information output from the semiconductor memory device, a pseudo d... | 02/24/2011 |
| 20110044113 | NONVOLATILE MEMORY DEVICE, METHOD FOR PROGRAMMING SAME, AND MEMORY SYSTEM INCORPORATING SAME A nonvolatile memory device performs a program operation on selected memory cells by determining a level of a program voltage based on a degree of deterioration of the memory cells, and executing the program operation using the program voltage.... | 02/24/2011 |
| 20110044108 | FLASH MEMORY DEVICE AND PROGRAM METHOD OF FLASH MEMORY DEVICE USING DIFFERENT VOLTAGES A flash memory and a program method of the flash memory include applying a pass voltage to word lines to boost a channel voltage, which is discharged to a ground voltage. A program voltage is applied to a selected word line and a local voltage is applied to at least one... | 02/24/2011 |
| 20110044105 | NONVOLATILE MEMORY DEVICE AND SYSTEM, AND METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory cells includes executing first through (N−1)th page programming operations, using an incremental step pulse programming (ISPP) method, to program first through (N−... | 02/24/2011 |
| 20110044104 | NONVOLATILE MEMORY DEVICE AND SYSTEM, AND METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory includes executing an incremental step pulse programming (ISPP) operation on the MLC memory cells, where the ISPP operation includes a programming sequence of first through N 02/24/2011 | |
| 20110044084 | MULTI-CHIP MEMORY DEVICE WITH STACKED MEMORY CHIPS, METHOD OF STACKING MEMORY CHIPS, AND METHOD OF CONTROLLING OPERATION OF MULTI-CHIP PACKAGE MEMORY A multi-chip memory device includes a transfer memory chip communicating input/output signals, a stacked plurality of memory chips each including a memory array having a designated bank, and a signal path extending upward from the transfer memory chip through the stack ... | 02/24/2011 |
| 20110043676 | CMOS IMAGE SENSOR AND IMAGE SIGNAL DETECTING METHOD A CMOS image sensor includes a photodiode, a switch configured to transfer a signal sensed by the photodiode to a sensing node, and a comparator electrically and directly connected to the sensing node and configured to compare the sensed signal of the sensing node and a... | 02/24/2011 |
| 20110043185 | CURRENT REFERENCE CIRCUIT A current reference circuit includes a proportional-to-absolute temperature (PTAT) current generator, a band-gap reference circuit and a current replication circuit. The PTAT generator generates a PTAT current. The band-gap reference circuit generates a reference voltag... | 02/24/2011 |
| 20110042769 | ULTRAVIOLET DETECTING DEVICE AND MANUFACTURING METHOD THREOF, AND ULTRAVIOLET QUANTITY MEASURING APPARATUS The present invention provides an ultraviolet detecting device which comprises a silicon semiconductor layer having a thickness ranging from greater than or equal to 3 nm to less than or equal to 36 nm, which is formed over an insulating layer, lateral PN-junction type ... | 02/24/2011 |
| 20110042746 | SINGLE TRANSISTOR MEMORY DEVICE HAVING SOURCE AND DRAIN INSULATING REGIONS AND METHOD OF FABRICATING THE SAME A single transistor floating-body dynamic random access memory (DRAM) device includes a floating body located on a semiconductor substrate and a gate electrode located on the floating body, the floating body including an excess carrier storage region. The DRAM device fu... | 02/24/2011 |
| 20110042200 | METHOD OF DEPOSITING AMORPHUS ALUMINIUM OXYNITRIDE LAYER BY REACTIVE SPUTTERING OF AN ALUMINIUM TARGET IN A NITROGEN/OXYGEN ATMOSPHERE A method of depositing an amorphous layer of AlON includes providing an aluminium sputter target in a chamber, exposing the target and chamber to O2 to saturate the exposed surfaces with oxygen, introducing a substrate into the chamber in an atmosphere contai... | 02/24/2011 |
| 20110040929 | METHOD AND APPARATUS FOR MODIFYING DATA SEQUENCES STORED IN MEMORY DEVICE A method of modifying data sequences in a memory system comprises receiving program data having a first data sequence, and determining whether the received first data sequence matches one of “m” predefined sequences stored in the memory system. The method further co... | 02/17/2011 |
| 20110038207 | FLASH MEMORY DEVICE, PROGRAMMING AND READING METHODS PERFORMED IN THE SAME The flash memory device includes a control logic circuit and a bit level conversion logic circuit. The control logic circuit programs first through Nth bits of data in a memory cell array of the N-bit MLC flash memory device or reads the first through Nt... | 02/17/2011 |
| 20110037147 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME An improved manufacturing method of a semiconductor device is provided. The method includes preparing a semiconductor substrate having an integrated circuit together with connection pads. The method also includes forming a dielectric film on the semiconductor substrate.... | 02/17/2011 |
| 20110035575 | MULTIPROCESSOR SYSTEM COMPRISING MULTI-PORT SEMICONDUCTOR MEMORY DEVICE A multiprocessor system comprises first and second processors connected to a multi-port semiconductor memory device. The multi-port semiconductor memory device comprises a shared memory area and a plurality of mailbox areas used for inter-processor communication. The fi... | 02/10/2011 |
| 20110035538 | NONVOLATILE MEMORY SYSTEM USING DATA INTERLEAVING SCHEME A memory system comprises a plurality of nonvolatile memory devices configured for interleaved access. Programming times are measured and recorded for various memory cell regions of the nonvolatile memory devices, and interleaving units are formed by memory cell regions... | 02/10/2011 |
| 20110035537 | MULTIPROCESSOR SYSTEM HAVING MULTI-COMMAND SET OPERATION AND PRIORITY COMMAND OPERATION A multiprocessor system comprises a multi-port semiconductor memory device, a first processor, and a memory link architecture. The multi-port semiconductor memory device comprises a mailbox area and a shared memory area accessible through a plurality of ports. The first... | 02/10/2011 |
| 20110035536 | NON-VOLATILE MEMORY DEVICE GENERATING WEAR-LEVELING INFORMATION AND METHOD OF OPERATING THE SAME A non-volatile memory device which includes a non-volatile memory core including a memory cell array and a controller configured to generate wear-leveling information from internal operation information of the memory cell array after a write operation, independent of a ... | 02/10/2011 |
| 20110032787 | INPUT BUFFER CIRCUIT, SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM An input buffer circuit includes a logic unit, a clock enable buffer, and a clock buffer. The logic unit is configured to receive a clock signal and a clock enable signal, and to output a decision signal indicative of whether the clock signal is normally input, where th... | 02/10/2011 |
| 20110032759 | MEMORY SYSTEM AND RELATED METHOD OF PROGRAMMING A method of programming a nonvolatile memory device comprises counting a number of state pairs in a unit of input data, modulating the unit of input data to reduce the number of state pairs contained therein, and programming the modulated unit of input data in the nonvo... | 02/10/2011 |
| 20110032753 | MEMORY CELLS INCLUDING RESISTANCE VARIABLE MATERIAL PATTERNS OF DIFFERENT COMPOSITIONS A non-volatile memory device includes a plurality of word lines, a plurality of bit lines, and an array of variable resistance memory cells each electrically connected between a respective word line and a respective bit line. Each of the memory cells includes first and ... | 02/10/2011 |
| 20110032747 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF PROGRAMMING VARIABLE RESISTANCE MEMORY DEVICES A variable resistance memory device includes a variable resistance memory cell, and a by-pass circuit configured to electrically by-pass a programming pulse supplied to the variable resistance memory cell after a resistive state of the variable resistance memory cell ha... | 02/10/2011 |
| 20110030064 | DATA MASK SYSTEM AND DATA MASK METHOD A data mask system includes a processor providing control signals including a command signal, an address signal, and a data signal, a data mask processor receiving the control signals and providing either write data or masked data in response to the control signals, and... | 02/03/2011 |
| 20110027825 | HIGH RESOLUTION CLASSIFICATION The present invention relates to a method of determining pulse height distribution by using an apparatus comprising: an analogue to digital pulses height categorisation unit comparing the pulse to analogue threshold voltages and counting each event within each pulse hei... | 02/03/2011 |
| 20110026334 | BIDIRECTIONAL EQUALIZER WITH CMOS INDUCTIVE BIAS CIRCUIT An integrated circuit (IC) device, system and related method of communicating data are described. The IC device includes; a data port configured to provide output data to a channel and receive input data from the channel, an impedance matching circuit connected to the d... | 02/03/2011 |
| 20110026326 | MEMORY SYSTEM INCLUDING FLASH MEMORY AND METHOD OF OPERATING THE SAME A method for operating a memory system including a flash memory device having a plurality of memory blocks includes determining whether a read error generated during a read operation of the flash memory device is caused by read disturbance and replacing a memory block w... | 02/03/2011 |
| 20110026306 | RESISTANCE VARIABLE MEMORY DEVICE REDUCING WORD LINE VOLTAGE A resistance variable memory device includes a memory cell array, a sense amplifier circuit, and a column selection circuit. The memory cell array includes a plurality of block units and a plurality of word line drivers, where each of the block units is connected betwee... | 02/03/2011 |
| 20110026163 | PRODUCTION METHOD OF FLUID DYNAMIC BEARING, FLUID DYNAMIC BEARING, SPINDLE MOTOR, AND DISK DRIVING APPARATUS According to the preferred embodiment of the present invention, a production method of a fluid dynamic bearing including: a shaft arranged along a center axis; an annular portion expanding radially outwards from the shaft; a sleeve having a top surface opposed to an und... | 02/03/2011 |
| 20110018141 | WIRING STRUCTURE IN A SEMICONDUCTOR DEVICE A wiring structure includes a first insulation layer located on a substrate, and first and second plugs located on the substrate and extending through the first insulation layer. The first plug includes an upper peripheral portion that defines a recess and the second pl... | 01/27/2011 |
| 20110018036 | VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word line... | 01/27/2011 |
| 20110010490 | SOLID STATE DRIVE AND RELATED METHOD OF OPERATION A solid state drive (SSD) comprises an input/output interface and a memory controller. The input/output interface stores a plurality of input/output commands. The memory controller comprises first and second input/output contexts and an input/output scheduler. The first... | 01/13/2011 |
| 20110007576 | SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY SEMICONDUCTOR DEVICE FOR CONTROLLING OUTPUT DATA Provided is a synchronous dynamic random access memory (DRAM) semiconductor device including multiple output buffers, a strobe control unit and multiple strobe buffers. Each of the output buffers is configured to output one bit of data. The strobe control unit is config... | 01/13/2011 |
| 20110007563 | NONVOLATILE MEMORY DEVICE, SYSTEM, AND RELATED METHODS OF OPERATION A method of reading a nonvolatile memory device comprises measuring threshold voltage distributions of a plurality of memory cells, combining the measured threshold voltage distributions, and determining local minimum points in the combined threshold voltage distributio... | 01/13/2011 |
| 20110007103 | APPARATUS FOR AND METHOD OF CONTROLLING BACKLIGHT OF DISPLAY PANEL IN CAMERA SYSTEM An apparatus controls a backlight of a display panel of a camera system. The apparatus includes a sub-pixel extracting unit, an ambient light luminance calculating unit, and a backlight controller. The sub-pixel extracting unit extracts sub-pixel luminance values from i... | 01/13/2011 |
| 20110006438 | SEMICONDUCTOR WAFER, AND SEMICONDUCTOR DEVICE FORMED THEREFROM A semiconductor wafer has a substrate, and a plurality of active areas formed on the substrate. Integrated circuits are formed in the active areas. The semiconductor wafer also has dicing areas formed between the adjacent active areas. A seal ring is formed along the ed... | 01/13/2011 |
| 20110004817 | CRC MANAGEMENT METHOD PERFORMED IN SATA INTERFACE AND DATA STORAGE DEVICE USING CRC MANAGEMENT METHOD A cyclic redundancy check (CRC) management method performed in a serial advanced technology attachment (SATA) interface and a data storage device using the CRC management method. A host interface connected to the SATA interface performs CRC computation on transmitted da... | 01/06/2011 |
| 20110004724 | METHOD AND SYSTEM FOR MANIPULATING DATA A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical... | 01/06/2011 |
| 20110002481 | AUDIO SIGNAL AMPLITUDE ADJUSTING DEVICE AND METHOD An audio signal amplitude adjusting device and method that can always adjust the amplitude of an input audio signal to such a level as to be easy to hear with making it follow each shift in the level of the input audio signal, thus preventing the occurrence of the sense... | 01/06/2011 |
| 20110002184 | METHOD OF DETECTING A LIGHT ATTACK AGAINST A MEMORY DEVICE AND MEMORY DEVICE EMPLOYING A METHOD OF DETECTING A LIGHT ATTACK A memory device having a plurality of memory cells employs a method to detect a light attack on the memory device. The method utilizes at least one memory cell to detect a light attack when the memory cell is in an inactive state, and outputs a signal indicating whether... | 01/06/2011 |
