Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
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| Application No. | Application Title | Issue Date |
| 20110045641 | Semiconductor Device Having Solder-Free Gold Bump Contacts for Stability in Repeated Temperature Cycles A semiconductor device has a chip (101) with gold studs (212) assembled on a tape substrate (102), which has solder balls (103) for attachment to external parts. The tape substrate (about 30 to 70 μm thick) has on its first surface first cop... | 02/24/2011 |
| 20110044094 | 10T SRAM Cell with Near Dual Port Functionality An integrated circuit including a ram array with SRAM cells containing a write port with a write word line and two read buffers with read word lines. The write port includes passgate transistors connected to each data node of the SRAM cell. A process of operating the in... | 02/24/2011 |
| 20110043700 | Method and Apparatus for Analog Graphics Sample Clock Frequency Offset Detection and Verification A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a... | 02/24/2011 |
| 20110043398 | CASCADED DAC ARCHITECTURE WITH PULSE WIDTH MODULATION An embodiment of the invention provides one or more cascade circuits that are cascaded together to form a cascaded circuit. The cascaded circuit reduces noise at an analog output of the cascaded circuit. Each of the cascade circuits contains a noise-shaping circuit, a P... | 02/24/2011 |
| 20110043340 | Concatenated Repetition Code with Convolutional Code A system and method for modulating and coding a signal is disclosed. Data from a Media Access Control (MAC) layer is convolutionally encoded. Robust coding of the data from the MAC layer is performed either before or after the convolutional encoding. The coded data is d... | 02/24/2011 |
| 20110043257 | TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with... | 02/24/2011 |
| 20110043255 | TEMPERATURE RESPONSIVE BACK BIAS CONTROL FOR INTEGRATED CIRCUIT The present invention provides a thermostatic biasing controller for use with an integrated circuit. In one embodiment, the thermostatic biasing controller includes a temperature sensing unit configured to determine an operating temperature of the integrated circuit. Ad... | 02/24/2011 |
| 20110043247 | IC OUTPUT SIGNAL PATH WITH SWITCH, BUS HOLDER, AND BUFFER An electronic integrated circuit includes a signal path connected between the functional logic (15) thereof and an external output terminal. The signal path includes a switch (S), a bus holder circuit (121B), and an output buffer (19).... | 02/24/2011 |
| 20110042753 | STRAIN-ENGINEERED MOSFETS HAVING RIMMED SOURCE-DRAIN RECESSES An integrated circuit (IC) includes a plurality of strained metal oxide semiconductor (MOS) devices that include a semiconductor surface having a first doping type, a gate electrode stack over a portion of the semiconductor surface, and source/drain recesses that extend... | 02/24/2011 |
| 20110041019 | SCAN TESTING SYSTEM, METHOD AND APPARATUS Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output... | 02/17/2011 |
| 20110041013 | ELECTRONIC DEVICE AND METHOD FOR VERIFYING CORRECT PROGRAM EXECUTION An electronic device is provided which comprises a microprocessor for executing a program code and a first hardware code path verifying (CPV) stage coupled to the microprocessor. The hardware CPV stage comprises a first error detection code (EDC) generator configured to... | 02/17/2011 |
| 20110041008 | Clock Data Recovery System A clock data recovery system is described. It includes a high pass filter for transmitting a filtered data signal in response to receiving an input data signal; an adder for summing the filtered data signal with a feedback signal, wherein the adder produces a summed inp... | 02/17/2011 |
| 20110039511 | RECEIVER FRONT END A low-power receiver front-end includes a transconductance amplifier that produces a single-ended current signal in response to a single-ended voltage signal. An output of the transconductance amplifier is provided to an LC tuned circuit. At resonance, the LC tuned circ... | 02/17/2011 |
| 20110038360 | Implant Access in the Medical Implant Communications Service Band A system and method for providing communications between a hub (medical controller) and a node (an implant) are disclosed. The hub selects an operating channel within a channel group in accordance with applicable regulations, and transmits signals to facilitate communic... | 02/17/2011 |
| 20110037649 | ENHANCING POSITION ACCURACY IN GLOBAL POSITIONING SYSTEM RECEIVERS Enhancing position accuracy in global positioning system receivers. A pseudorange is measured, in a receiver, from each signal of a plurality of signals. Each signal is received from a different one of a plurality of satellites. A check is performed for an inconsistency... | 02/17/2011 |
| 20110037527 | FAST START-UP CRYSTAL OSCILLATOR An exemplary fast start-up crystal oscillator with reduced start-up time. The exemplary oscillator reduces the start-up time (i.e., the time taken to attain sustained stable oscillations after the power is turned on) by increasing the negative resistance of a circuit. I... | 02/17/2011 |
| 20110037523 | CHARGE PUMP LINEARIZATION FOR DELTA-SIGMA FRACTIONAL-N PHASE LOCKED LOOPS A method and apparatus for linearizing a phase locked loop (PLL) are provided. To accomplish this, three separate signal (two feedback/one reference or two reference/one feedback) are applied to two phase/frequency detectors (PFDs). Either an edge of the one reference s... | 02/17/2011 |
| 20110037509 | APPARATUS AND METHOD FOR EFFICIENT LEVEL SHIFT An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level output signal of a second voltage domain. The first level shifter comprises a storing element in the second volt... | 02/17/2011 |
| 20110037447 | Component Powered by HDMI Interface A HDMI (High-Definition Multimedia Interface) transmitter component may be operated solely on power that is scavenged and converted from termination tail current received while the HDMI transmitter component is coupled to an HDMI compliant sink connector on a HDMI recei... | 02/17/2011 |
| 20110035644 | Data Path Read/Write Sequencing for Reduced Power Consumption A solid-state memory such as a ferroelectric random access memory (FeRAM) with multiplexed internal data bus and reduced power consumption on data transfer. The memory stores data in the form of multi-byte data words with error correction coding (ECC). In a page mode re... | 02/10/2011 |
| 20110034023 | SILICON CARBIDE FILM FOR INTEGRATED CIRCUIT FABRICATION A silicon carbide (SiC) film for use in backend processing of integrated circuit manufacturing, is generated by including hydrogen in the reaction gas mixture. This SiC containing film is suitable for integration into etch stop layers, dielectric cap layers and hardmask... | 02/10/2011 |
| 20110033985 | Manufacturing Method for Integrating a Shunt Resistor into a Semiconductor Package An integrated circuit package that comprises a lead frame, an integrated circuit located on the lead frame and a shunt resistor coupled to the lead frame and to the integrated circuit. The shunt resistor has a lower temperature coefficient of resistance than the lead fr... | 02/10/2011 |
| 20110033785 | METHOD OF FABRICATING INTEGRATED CIRCUIT USING ALTERNATING PHASE-SHIFT MASK AND PHASE-SHIFT TRIM MASK An integrated circuit is fabricated using photolithography by selectively exposing a photoresist layer to pattern a coarse line region of a wafer layer using a trim mask, and to pattern a fine line region of the wafer layer using an alternating phase-shift mask. The tri... | 02/10/2011 |
| 20110032983 | Probabilistic Bit-Rate and Rate-Distortion Cost Estimation for Video Coding A method of video encoding is provided that includes computing spatial variance for video data in a block of a video sequence, estimating a first bit-rate based on the spatial variance, a transform coefficient threshold, and variance multiplicative factors empirically d... | 02/10/2011 |
| 20110032839 | Multiple Rank CQI Feedback for Cellular Networks Single user and multiuser MIMO transmission in a cellular network may be performed by a base station (eNB) transmitting either one, two, or more transmission layers. A user equipment (UE) receives a reference symbol from the base station. The UE processes the reference ... | 02/10/2011 |
| 20110032646 | METHODS AND APPARATUS TO MANAGE GROUND FAULT CONDITIONS WITH A SINGLE COIL A ground fault detection device includes a sense coil including a primary winding and a secondary winding to detect current in a line conductor and a neutral conductor. It also includes a capacitor in parallel with the secondary winding and a virtual inductor to form a ... | 02/10/2011 |
| 20110032027 | SWITCHED BANDGAP REFERENCE CIRCUIT FOR RETENTION MODE A low power bandgap reference circuit for retention mode in system on chips (SoCs). A switched bandgap reference includes bandgap reference circuit coupled to a storage capacitor through a switch. A logic having a set of control signals controls the switch and the bandg... | 02/10/2011 |
| 20110031944 | HIGH VOLTAGE LATCHING AND DC RESTORATION ISOLATION AND LEVEL SHIFTING METHOD AND APPARATUS A device and method for dc isolation and level shifting includes a driver circuit powered by a first voltage range, a capacitor connected to the driver circuit, and a latching circuit connected to the capacitor. The latching circuit is powered by a second voltage range ... | 02/10/2011 |
| 20110031581 | INTEGRATED CIRCUIT (IC) HAVING TSVS WITH DIELECTRIC CRACK SUPPRESSION STRUCTURES An IC includes a substrate having a semiconductor top surface, a plurality of metal interconnect levels having inter-level dielectric (ILD) layers therebetween on the top surface, and a bottom surface. A plurality of through substrate vias (TSVs) extend from a TSV termi... | 02/10/2011 |
| 20110031557 | GATE DIELECTRIC FIRST REPLACEMENT GATE PROCESSES AND INTEGRATED CIRCUITS THEREFROM A method for fabricating a CMOS integrated circuit (IC) and ICs therefrom includes the steps of providing a substrate having a semiconductor surface, wherein the semiconductor surface has PMOS regions for PMOS devices and NMOS regions for NMOS devices. A gate dielectric... | 02/10/2011 |
| 20110029756 | Method and System for Decoding Low Density Parity Check Codes A method for decoding a codeword in a data stream encoded according to a low density parity check (LDPC) code having an m×j parity check matrix H by initializing variable nodes with soft values based on symbols in the codeword, wherein a graph representation of H inclu... | 02/03/2011 |
| 20110029565 | Generation of a Media Profile One aspect of the invention includes a computer device. The computer device includes a network interface component configured to download media from an external source through a secure network connection. The computer device also includes a memory configured to store th... | 02/03/2011 |
| 20110029119 | Process and Method for a Decoupled Multi-Parameter Run-to-Run Controller A manufacturing process including a controller method to generate a tool setting which includes a tool offset and a device offset. The controller method uses a device parameter measurement to update the tool offset and device offset. A tool weight and a device weight is... | 02/03/2011 |
| 20110027954 | METHOD TO IMPROVE TRANSISTOR TOX USING SI RECESSING WITH NO ADDITIONAL MASKING STEPS A method of forming a transistor device is provided wherein a gate structure is formed over a semiconductor body of a first conductivity type. The gate structure is formed comprising a protective cap thereover and defining source/drain regions laterally adjacent thereto... | 02/03/2011 |
| 20110027953 | Laminated Stress Overlayer Using In-SITU Multiple Plasma Treatments for Transistor Improvement Integrated circuits (ICs) commonly contain pre-metal dielectric (PMD) liners with compressive stress to increase electron and hole mobilities in MOS transistors. The increase is limited by the thickness of the PMD liner. The instant invention is a multi-layered PMD line... | 02/03/2011 |
| 20110027943 | Stud Bumps as Local Heat Sinks During Transient Power Operations A thermal management configuration for a flip chip semiconductor device is disclosed. The device includes a high power silicon based die having a metal bonding surface. A plurality of interconnects are formed on the metal surface and connected to a substrate. A pluralit... | 02/03/2011 |
| 20110026929 | Reconfigurable Optical Add/Drop Multiplexer Disclosed is an add-drop multiplexer that receives an optical signal having a plurality of channels. The multiplexer spatially separates the channels, and a spatial light modulator within the multiplexer, which in some embodiments is a switched blazed grating, routes th... | 02/03/2011 |
| 20110026718 | VIRTUALIZER WITH CROSS-TALK CANCELLATION AND REVERB Audio loudspeaker and headphone virtualizers and cross-talk cancellers and methods use separate virtual speaker locations for different Bark frequency bands and a single reverberation filter for multi-channel virtualizer inputs.... | 02/03/2011 |
| 20110026651 | AUTOMATIC GAIN CONTROL IN A RECEIVER Automatic gain control in a receiver. A method for controlling operating range of an analog-to-digital converter (ADC) by an automatic gain control circuit includes estimating a peak-to-average ratio corresponding to an analog signal from digital samples of the analog s... | 02/03/2011 |
| 20110026621 | OFDM TRANSMISSION METHODS IN THREE PHASE MODES Systems and methods for power line transmission are disclosed in which transmitters and receivers are connected to one or more phases of the power line. At least one symbol stream to be transmitted on the power line network is generated. The at least one symbol stream i... | 02/03/2011 |
