Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Application No. | Application Title | Issue Date |
| 20110046924 | METHOD FOR JOINT MODELING OF MEAN AND DISPERSION The present invention describes a method and system for joint modeling of a mean and dispersion of data. A computing system derives a loss function taking into account distributional requirements over the data. The computing system represents separate regression functio... | 02/24/2011 |
| 20110046185 | Arylchalcogenoarylalkyl-substituted imidazolidine-2,4-diones, process for preparation thereof, medicaments comprising these compounds and use thereof The invention relates to compounds of formula (I) wherein the groups R and R′ A, D, E, G, L, p and R1 to R10 have the stated meanings and to their physiologically compatible salts. Said compounds are suitable, for example, as anti-obesity drugs. | 02/24/2011 |
| 20110046105 | Heterocycle-substituted imidazolidine-2,4-diones, process for preparation thereof, medicaments comprising them and use thereof The invention relates to compounds of formula (I) wherein the groups R and R′, A, D, E, G, L, p and R1 to R10 have the stated meanings and to their physiologically compatible salts. Said compounds are suitable, for example, as anti-obesity drugs. | 02/24/2011 |
| 20110044369 | SILICON CARRIER OPTOELECTRONIC PACKAGING An optoelectronic (OE) package or system and method for fabrication is disclosed which includes a silicon layer with wiring. The silicon layer has an optical via for allowing light to pass therethrough. An optical coupling layer is bonded to the silicon layer, and the o... | 02/24/2011 |
| 20110044367 | 3D OPTOELECTRONIC PACKAGING An optoelectronic (OE) package or system and method for fabrication is disclosed which includes a silicon layer with a wiring layer. The silicon layer has an optical via for allowing light to pass therethrough. An optical coupling layer is bonded to the silicon layer, a... | 02/24/2011 |
| 20110043387 | DATA COMPRESSION USING A NESTED HIERACHY OF FIXED PHRASE LENGTH STATIC AND DYNAMIC DICTIONARIES The present invention describes lossless data compression/decompression methods and systems. A random access memory (RAM) operates as a static dictionary and includes commonly used strings/symbols/phrases/words. An input buffer operates as a dynamic dictionary and inclu... | 02/24/2011 |
| 20110042826 | SACRIFICIAL INORGANIC POLYMER INTERMETAL DIELECTRIC DAMASCENE WIRE AND VIA LINER The present invention provides a method of forming a rigid interconnect structure, and the device therefrom, including the steps of providing a lower metal wiring layer having first metal lines positioned within a lower low-k dielectric; depositing an upper low-k dielec... | 02/24/2011 |
| 20110042790 | MULTIPLE PATTERNING USING IMPROVED PATTERNABLE LOW-k DIELECTRIC MATERIALS A method of double patterning a semiconductor structure with a single material which after patterning becomes a permanent part of the semiconductor structure. More specifically, a method to form a patterned semiconductor structure with small features is provided which a... | 02/24/2011 |
| 20110042771 | Near-Infrared Absorbing Film Compositions A curable liquid formulation comprising: (i) one or more near-infrared absorbing polymethine dyes; (ii) one or more crosslinkable polymers; and (iii) one or more casting solvents. The invention is also directed to solid near-infrared absorbing films composed of crosslin... | 02/24/2011 |
| 20110042751 | THERMAL DUAL GATE OXIDE DEVICE INTEGRATION A method is provided that includes providing a semiconductor substrate including at least a thin gate oxide pFET device region and a thick gate oxide pFET device region and forming a thin gate oxide pFET within the thin gate oxide pFET device region and a thick gate oxi... | 02/24/2011 |
| 20110042744 | METHOD OF FORMING EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) DEVICE WITHOUT ION IMPLANTATION A method of fabricating a semiconductor device is provided in which the channel of the device is present in an extremely thin silicon on insulator (ETSOI) layer, i.e., a silicon containing layer having a thickness of less than 10.0 nm. In one embodiment, the method may ... | 02/24/2011 |
| 20110042731 | STRUCTURE AND METHOD OF FORMING ENHANCED ARRAY DEVICE ISOLATION FOR IMPLANTED PLATE EDRAM A method for forming a memory device in a semiconductor on insulator substrate is provided, in which a protective oxide that is present on the sidewalls of the trench protects the first semiconductor layer, i.e., SOI layer, of the semiconductor on insulator substrate du... | 02/24/2011 |
| 20110042728 | SEMICONDUCTOR DEVICE WITH ENHANCED STRESS BY GATES STRESS LINER In one embodiment, a method is provided for forming stress in a semiconductor device. The semiconductor device may include a gate structure on a substrate, wherein the gate structure includes at least one dummy material that is present on a gate conductor. A conformal d... | 02/24/2011 |
| 20110042687 | GRAPHENE GROWTH ON A CARBON-CONTAINING SEMICONDUCTOR LAYER A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as a silicon substrate. The semiconductor-carbon alloy layer is converted into at least one graphene layer during... | 02/24/2011 |
| 20110042653 | Near-Infrared Absorbing Film Compositions A curable liquid formulation containing at least (i) one or more near-infrared absorbing triphenylamine-based dyes, and (ii) one or more casting solvents. The invention is also directed to solid near-infrared absorbing films composed of crosslinked forms of the curable ... | 02/24/2011 |
| 20110040601 | METHOD AND APPARATUS FOR CUSTOMER SEGMENTATION USING ADAPTIVE SPECTRAL CLUSTERING A method and system for customer segmentation using adaptive spectral clustering may include determining initial segmentation labels, determining new customer behavior data, formulating a single objective minimization function that integrates the initial segmentation la... | 02/17/2011 |
| 20110039883 | AZOLOPYRIDIN-2-ONE DERIVATIVES AS LIPASE AND PHOSPHOLIPASE INHIBITORS The present invention provides compounds which have an inhibitory effect on hormone-sensitive lipase or endothelial lipase. The compounds of the invention are azolopyridin-2-one derivatives of the general formula I 02/17/2011 | |
| 20110039829 | PYRAZOLE-CARBOXAMIDE DERIVATIVES AS P2Y12 ANTAGONISTS The present invention relates to compounds of the formula I, wherein | 02/17/2011 |
| 20110039413 | METHOD FOR FORMING TRENCHES HAVING DIFFERENT WIDTHS AND THE SAME DEPTH A lithographic material stack including a photo-resist and an organic planarizing layer is combined with an etch process that generates etch residues over a wide region from sidewalls of etched regions. By selecting the etch chemistry that produces deposition of etch re... | 02/17/2011 |
| 20110038525 | METHOD FOR QUANTIFYING THE MANUFACTURING COMPLEXITY OF ELECTRICAL DESIGNS A method and system for quantifying manufacturing complexity of electrical designs randomly places simulated defects on image data representing electrical wiring design. The number of distinct features in the image data without the simulated defects and the number of di... | 02/17/2011 |
| 20110037175 | INTERCONNECTION BETWEEN SUBLITHOGRAPHIC-PITCHED STRUCTURES AND LITHOGRAPHIC-PITCHED STRUCTURES An interconnection between a sublithographic-pitched structure and a lithographic pitched structure is formed. A plurality of conductive lines having a sublithographic pitch may be lithographically patterned and cut along a line at an angle less than 45 degrees from the... | 02/17/2011 |
| 20110037161 | ELECTROSTATIC CHUCKING OF AN INSULATOR HANDLE SUBSTRATE A back of a dielectric transparent handle substrate is coated with a blanket conductive film or a mesh of conductive wires. A semiconductor substrate is attached to the transparent handle substrate employing an adhesive layer. The semiconductor substrate is thinned in t... | 02/17/2011 |
| 20110037125 | EXTREMELY THIN SILICON ON INSULATOR (ETSOI) COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) WITH IN-SITU DOPED SOURCE AND DRAIN REGIONS FORMED BY A SINGLE MASK A method of fabricating an electronic structure is provided that includes forming a first conductivity doped first semiconductor material on the SOI semiconductor layer of a substrate. The SOI semiconductor layer has a thickness of less than 10 nm. The first conductivit... | 02/17/2011 |
| 20110035399 | USING HISTORICAL INFORMATION TO IMPROVE SEARCH ACROSS HETEROGENEOUS INDICES A method, system and computer program product are disclosed for searching for data. In one embodiment, the invention provides a method comprising identifying a query and a search scope including a set of specified entities; and for each of these entities, estimating a n... | 02/10/2011 |
| 20110035343 | METHOD AND SYSTEM OF DETERMINING A PRIORITIZED LIST OF USERS RELATED TO A GIVEN GOAL A method and system of determining a prioritized list of one or more users related to a given goal obtaining a set of places, determine one or more future places an expert associated with a given goal is predicted to visit to accomplish the given goal, obtain a history ... | 02/10/2011 |
| 20110034461 | SF5 DERIVATIVES AS PAR1 INHIBITORS, PRODUCTION THEREOF, AND USE AS MEDICAMENTS The invention relates to novel compounds of formula I where R1, R2, R3, R4, R5, R9, Ar, Q1, Q2 and Q3 are each as defined below. The compounds of the formula I have antithrombotic activity and inhibit especia... | 02/10/2011 |
| 20110034456 | IMIDAZOPYRIDAZINES AS PAR1 INHIBITORS, PRODUCTION THEREOF, AND USE AS MEDICAMENTS The invention relates to novel compounds of formula I where R1, R2, R3, R4, R5, R6, R7, R8, R9, Q1, Q2 and Q3 are each as defined below. The compounds of formula I have antithrombotic activity and inhibit esp... | 02/10/2011 |
| 20110034452 | TRIAZOLIUM SALTS AS PAR1 INHIBITORS, PRODUCTION THEREOF, AND USE AS MEDICAMENTS The invention relates to novel compounds of formula I where X, A−, Q1, Q2 Q3, R2, R3, R4, R5, R6, R7, R8 and R9 are each as defined below. The compounds of formula I have antithrombotic activity ... | 02/10/2011 |
| 20110033124 | IMAGE PROCESSOR The image processor processes each pixel of a halftone image by sequentially setting each pixel as a target pixel. A converting unit converts a pixel density of the target pixel into a first output value. An error data calculation unit calculates error data of the targe... | 02/10/2011 |
| 20110032825 | MULTIPATH DISCOVERY IN SWITCHED ETHERNET NETWORKS A network switch device receives a communication packet having a source MAC address s and a destination MAC address d at a switch port p. Then, the network switch device determines whether a valid routing table entry (s, p) exists, there by indicating that the source MA... | 02/10/2011 |
| 20110032555 | PRINTER A printer includes an input unit, a cell-size changing unit, a print data creating unit, and a printing unit. The input unit receives table data describing a table including a plurality of cells. Each of the plurality of cells has a size. The cell-size changing unit is ... | 02/10/2011 |
| 20110032025 | PROGRAMMABLE SEMICONDUCTOR DEVICE A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end ... | 02/10/2011 |
| 20110031623 | INTERCONNECT STRUCTURE AND METHOD FOR Cu/ULTRA LOW k INTEGRATION A semiconductor structure is provided that includes a lower interconnect level including a first dielectric material having at least one conductive feature embedded therein; a dielectric capping layer located on the first dielectric material and some, but not all, porti... | 02/10/2011 |
| 20110031620 | METHOD OF THINNING A SEMICONDUCTOR SUBSTRATE A C4 grind tape and a laser-ablative adhesive layer are formed on a front side of a semiconductor substrate. A carrier substrate is thereafter attached to the laser-ablative adhesive layer. The back side of the semiconductor substrate is thinned by polishing or grinding... | 02/10/2011 |
| 20110031554 | STRUCTURE AND METHOD TO IMPROVE THRESHOLD VOLTAGE OF MOSFETS INCLUDING A HIGH K DIELECTRIC A method of forming threshold voltage controlled semiconductor structures is provided in which a conformal nitride-containing liner is formed on at least exposed sidewalls of a patterned gate dielectric material having a dielectric constant of greater than silicon oxide... | 02/10/2011 |
| 20110029949 | WIDGET COMBOS: A WIDGET PROGRAMMING MODEL A system and method that can be used to create a new API via a combination of existing APIs, e.g., given a set of existing APIs. The system and method also allow the user to remove existing API elements from the generated API, and to add new API elements to the generate... | 02/03/2011 |
| 20110029901 | PRINTING APPARATUS, COMPOSITE IMAGE DATA GENERATING APPARATUS, AND COMPOSITE IMAGE DATA GENERATING PROGRAM A printing apparatus which prints a composite image formed of a background image and an input image on a recording medium includes: a display; a display image data generating section which generates data of a display image to be displayed on the display; a display contr... | 02/03/2011 |
| 20110029818 | INFORMATION PROCESSING DEVICE An information processing device may comprise a log file creating unit and a first storage controlling unit. The log file creating unit may be configured to create, each time information is input, one log file that includes log information indicating an input of the inf... | 02/03/2011 |
| 20110029473 | MATCH ENGINE FOR DETECTION OF MULTI-PATTERN RULES Methods, systems and computer program products are disclosed for detecting patterns in a data stream that match multi-pattern rules. One embodiment of the invention provides a method of recognizing a specified group of patterns in a data stream. The method comprises ide... | 02/03/2011 |
| 20110027951 | SHARED GATE FOR CONVENTIONAL PLANAR DEVICE AND HORIZONTAL CNT A semiconductor structure in which a planar semiconductor device and a horizontal carbon nanotube transistor have a shared gate and a method of fabricating the same are provided in the present application. The hybrid semiconductor structure includes at least one horizon... | 02/03/2011 |
