Did You Know...
...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Application No. | Application Title | Issue Date |
| 20110047547 | VIRTUALIZATION EVENT PROCESSING IN A LAYERED VIRTUALIZATION ARCHITECTURE Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and evaluation logic. The event logic is to recognize a virtualization event. The e... | 02/24/2011 |
| 20110047318 | Reducing capacitive load in a large memory array In various embodiments, field-effect transistors (FETs) or other high-resistance electronic switches may be used to take a large group of parallel-connected memory devices and separate them into smaller groups of parallel-connected devices, so that the signal lines in e... | 02/24/2011 |
| 20110044392 | Systems And Methods For High-Throughput Wideband Wireless Local Area Network Communications A frame format provides for wideband wireless local area network communications and informs narrower-band communication units when the channels are occupied by wider-band communication units. In some embodiments, the frame format includes a channelization field identify... | 02/24/2011 |
| 20110044244 | MAC/PHY IDENTIFICATION OF BASE STATION TYPES AND THEIR PREFERRED AND RESTRICTED ACCESS Embodiments of a system and methods for identification of base station types are generally described herein. Other embodiments may be described and claimed.... | 02/24/2011 |
| 20110043518 | Techniques to store and retrieve image data In a graphics pipeline, during or at the end of a rasterization stage, a post-clip output stage stores primitives and pixels are stored in a portion of memory. Availability of primitives and pixels during or at the end of the rasterization stage permits a variety of man... | 02/24/2011 |
| 20110040911 | DUAL INTERFACE COHERENT AND NON-COHERENT NETWORK INTERFACE CONTROLLER ARCHITECTURE A dual interface coherent and non-coherent network interface controller architecture is generally presented. In this regard, a network interface controller is introduced including a non-coherent bus interface to communicatively couple with devices of a system through a ... | 02/17/2011 |
| 20110035564 | TECHNIQUE TO PERFORM MEMORY DISAMBIGUATION A memory access management technique. More particularly, at least one embodiment of the invention relates to a technique to issue loads to a memory ahead of older store operations corresponding to the same target address.... | 02/10/2011 |
| 20110035555 | METHOD AND APPARATUS FOR AFFINITY-GUIDED SPECULATIVE HELPER THREADS IN CHIP MULTIPROCESSORS Apparatus, system and methods are provided for performing speculative data prefetching in a chip multiprocessor (CMP). Data is prefetched by a helper thread that runs on one core of the CMP while a main program runs concurrently on another core of the CMP. Data prefetch... | 02/10/2011 |
| 20110035535 | Tracking a lifetime of write operations to a non-volatile memory storage A method, device, and system are disclosed. In one embodiment method begins by incrementing a count of a total number of write operations to a non-volatile memory storage for each write operation to the non-volatile memory storage. The method then receives a request for... | 02/10/2011 |
| 20110035534 | Dual-scope directory for a non-volatile memory storage system A device, system, and method are disclosed. In one embodiment the device includes a non-volatile memory (NVM) storage array to store a plurality of storage elements. The device also includes a dual-scope directory structure having a background space and a foreground spa... | 02/10/2011 |
| 20110031590 | Liquid film assisted laser die marking and structures formed thereby Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a liquid on a region of a die, and then forming an identification mark through the liquid on the die.... | 02/10/2011 |
| 20110029769 | METHOD FOR USING TRUSTED, HARDWARE IDENTITY CREDENTIALS IN RUNTIME PACKAGE SIGNATURE TO SECURE MOBILE COMMUNICATIONS AND HIGH VALUE TRANSACTION EXECUTION A method for trusted package digital signature based on secure, platform-bound identity credentials. The selection of a document to be electronically signed by a user via a computing device is made. A hash for the document is determined. The hash is encrypted with a pri... | 02/03/2011 |
| 20110028108 | Method and apparatus to provide low cost transmit beamforming for network devices Techniques and structures for use in generating an approximated beamforming matrix in a MIMO based system are disclosed. The techniques and structures may be used to allow closed loop MIMO beamforming to be performed within a device that does not include singular value ... | 02/03/2011 |
| 20110023690 | Hand-held music player with wireless peer-to-peer music sharing The apparatus involves a hand-held housing with a memory for storing coded audio event data, a mechanism for downloading into the memory coded audio event data and digital-audio electronics for retrieving coded audio event data from memory, converting it to an audio sig... | 02/03/2011 |
| 20110018767 | ADAPTIVE ANTENNA BEAMFORMING Adaptive antenna beamforming may involve a maximum signal-to-noise ratio beamforming method, a correlation matrix based beamforming method, or a maximum ray beamforming method. The adaptive antenna beamforming may be used in a millimeter-wave wireless personal area netw... | 01/27/2011 |
| 20110018145 | MICROELECTRONIC SUBSTRATE INCLUDING EMBEDDED COMPONENTS AND SPACER LAYER AND METHOD OF FORMING SAME A microelectronic substrate, a method of forming the same, and a system including the same. The microelectronic substrate comprises: a conductive layer; a spacer layer disposed onto the conductive dielectric layer; a dielectric build-up layer disposed onto the spacer la... | 01/27/2011 |
| 20110018063 | APPARATUS AND METHODS FOR IMPROVING MULTI-GATE DEVICE PERFORMANCE Embodiments of an apparatus and methods for improving multi-gate device performance are generally described herein. Other embodiments may be described and claimed.... | 01/27/2011 |
| 20110016372 | Prediction and cancellation of systematic noise sources in non-volatile memory Various embodiments of the invention pertain to a technique of recovering data from a portion of a non-volatile memory which was not reliably read because the number of read errors exceeded the ability of the ECC process to correct those errors. For each cell in that po... | 01/20/2011 |
| 20110014878 | WIRELESS ANTENNA ARRAY SYSTEM ARCHITECTURE AND METHODS TO ACHIEVE 3D BEAM COVERAGE Embodiments of wireless antenna array systems to achieve three-dimensional beam coverage are described herein. Other embodiments may be described and claimed.... | 01/20/2011 |
| 20110013603 | Techniques for MIMO beamforming for frequency selective channels in wireless communication systems An embodiment of the present invention provides an apparatus that may include a transceiver operable as a base station (BS) in a wireless network and adapted for multiple input multiple output (MIMO) beamforming and further adapted for wireless communication with a rece... | 01/20/2011 |
| 20110013524 | TRAINED DATA TRANSMISSION FOR COMMUNICATION SYSTEMS Various embodiments are described for a trained data transmission for communication systems.... | 01/20/2011 |
| 20110013360 | Quasi-radial heatsink with rectangular form factor and uniform fin length In some embodiments, a heatsink includes a thermally conductive core and at least ten thermally conductive fins extending quasi-radially from the thermally conductive core, wherein most of the fins are of uniform length, and wherein at least a portion of the thermally c... | 01/20/2011 |
| 20110010429 | Method and apparatus for caching multimedia content from the internet on occasionally-connected devices An arrangement is provided for caching multimedia content on occasionally connected devices. A play list is created and submitted to a multimedia content provider that provides and processes the desired multimedia content in the play list before the desired content is d... | 01/13/2011 |
| 20110008937 | SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS A method to provide a transistor or memory cell structure. The method comprises: providing a substrate including a lower Si substrate and an insulating layer on the substrate; providing a first projection extending above the insulating layer, the first projection includ... | 01/13/2011 |
| 20110006344 | Method for improving transistor performance through reducing the salicide interface resistance An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the source a... | 01/13/2011 |
| 20110004804 | Systems and methods for channel coding of wireless communication Embodiments of an apparatus and method for coding of wireless transmissions channel are generally described herein. Other embodiments may be described and claimed.... | 01/06/2011 |
| 20110004715 | METHOD AND SYSTEM FOR HANDLING A MANAGEMENT INTERRUPT EVENT IN A MULTI-PROCESSOR COMPUTING DEVICE A method and system for handling a management interrupt, such as a system management interrupt (SMI) and/or a platform management interrupt (PMI), includes sequestering two or more processor cores from a plurality of processor cores to form a group of sequestered proces... | 01/06/2011 |
| 20110003471 | Fabrication of interconnects in a low-k interlayer dielectrics A method for forming deep lithographic interconnects between a first metal and a second metal is provided. The method comprises depositing a first insulator layer on a semiconductor substrate; etching the first insulator layer at a selected location to provide at least ... | 01/06/2011 |
| 20110002387 | Techniques for motion estimation Techniques are described that can be used to apply motion estimation (ME) based on reconstructed reference pictures in a B frame or in a P frame at a video decoder. For a P frame, projective ME may be performed to obtain a motion vector (MV) for a current input block. I... | 01/06/2011 |
| 20110001755 | LOW-LATENCY REMOTE DISPLAY RENDERING USING TILE-BASED RENDERING SYSTEMS Apparatus, systems and methods for low latency remote display rendering using tile-based rendering systems are disclosed. In one implementation, a system includes a network interface and a content source coupled to the network interface. The content source being capable... | 01/06/2011 |
| 20110001202 | FORMING INDUCTOR AND TRANSFORMER STRUCTURES WITH MAGNETIC MATERIALS USING DAMASCENE PROCESSING FOR INTEGRATED CIRCUITS Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on th... | 01/06/2011 |
| 20100333074 | Automatic conversion of MPI source code programs into MPI thread-based programs A method, system, and computer program product containing instructions for automatically converting an MPI source code program into an MPI thread-based program. In response to inputs in the form of an MPI source code program and a command, a converter declares a global ... | 12/30/2010 |
| 20100332987 | Graphics analysis techniques Embodiments provide techniques for the analysis of graphics applications. For instance, an apparatus may include a graphics application program interface (API), a graphics engine, and a graphics analysis tool. The graphics analysis tool may receive multiple draw calls i... | 12/30/2010 |
| 20100332921 | Fast data eye retraining for a memory A method, device, and system are disclosed. In one embodiment method includes determining a left edge and right edge of a valid data eye for a memory. The method continues by periodically checking the left and right edges for movement during operation of the memory. If ... | 12/30/2010 |
| 20100332869 | Method and apparatus for performing energy-efficient network packet processing in a multi processor core system A method and apparatus for managing core affinity for network packet processing is provided. Low-power idle state of a plurality of processing units in a system including the plurality of processing units is monitored. Network packet processing is dynamically reassigned... | 12/30/2010 |
| 20100332857 | Reducing power losses in a redundant power supply system A power supply system includes at least a first power supply module and at least one redundant power supply module. The at least one power supply module supplies power to an output terminal. The at least one redundant power supply module operates in a first state and in... | 12/30/2010 |
| 20100332856 | System and method for processor utilization adjustment to improve deep C-state use In some embodiments, the invention involves modification of the processor utilization calculations that are used by operating system power management services to improve processor efficiency. An embodiment of the present invention is a system and method relating to powe... | 12/30/2010 |
| 20100332813 | SYSTEM AND METHOD FOR UTILIZING A PROTECTED/HIDDEN REGION OF SEMICONDUCTOR BASED MEMORY/STORAGE A method for accessing a protected area of a solid-state storage device via firmware control is described. During system initialization, firmware components are loaded and executed to initialize a computer system. These firmware components include a firmware driver for ... | 12/30/2010 |
| 20100332811 | SPECULATIVE MULTI-THREADING FOR INSTRUCTION PREFETCH AND/OR TRACE PRE-BUILD The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is a speculative prefetch thread to perform instruction prefetch and/or trace pre-build for the main threa... | 12/30/2010 |
| 20100332788 | AUTOMATICALLY USING SUPERPAGES FOR STACK MEMORY ALLOCATION In one embodiment, the present invention includes a page fault handler to create page table entries and TLB entries in response to a page fault, the page fault handler to determine if a page fault resulted from a stack access, to create a superpage table entry if the pa... | 12/30/2010 |
