Bizarre Patents
Pillow with retractable umbrella
A pillow assembly having a supporting assembly and a retractable umbrella assembly that is easily transportable and allows a user to support his/her head while covering their face from sunlight.
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| Number | Title | Issue Date |
| 8180998 | System of lanes of processing units receiving instructions via shared memory units for data-parallel or task-parallel operations A system for performing data-parallel operations and task-parallel operations. A first switch fabric node (SFN) includes first and second lane processing engines (LPEs). The first LPE includes a first set of lane processing units (LPUs) configured to perform data-pa... | 05/15/2012 |
| 8180943 | Method and apparatus for latency based thread scheduling A method and apparatus for providing latency based thread scheduling. A thread attribute, e.g., latency of a process, is used in effecting the scheduling of the thread. ... | 05/15/2012 |
| 8179394 | Cull streams for fine-grained rendering predication One embodiment of the present invention sets forth a technique to perform fine-grained rendering predication using an IGPU and a DGPU. A graphics driver divides a 3D object into batches of triangles. The IGPU processes each batch of triangles through a modified rend... | 05/15/2012 |
| 8179388 | System, method and computer program product for adjusting a refresh rate of a display for power savings A display refresh system, method and computer program product are provided. In use, a refresh rate is adjusted for power saving purposes, and/or any other purpose(s) for that matter. Further, various embodiments are provided for reducing visual manifestations associ... | 05/15/2012 |
| 8176545 | Integrated policy checking system and method A system and method are provided for validating a security service associated with packets communicated on a network. A hash of a security service associated with packets communicated on a network is generated. In use, the security service associated with the packet... | 05/08/2012 |
| 8176265 | Shared single-access memory with management of multiple parallel requests A memory is used by concurrent threads in a multithreaded processor. Any addressable storage location is accessible by any of the concurrent threads, but only one location at a time is accessible. The memory is coupled to parallel processing engines that generate a ... | 05/08/2012 |
| 8175160 | System, method, and computer program product for refining motion vectors A system, method, and computer program product are provided for refining motion vectors. In operation, a plurality of motion vectors associated with a current frame and a first resolution are created. Furthermore, the motion vectors are refined utilizing information... | 05/08/2012 |
| 8174531 | Programmable graphics processor for multithreaded execution of programs A processing unit includes multiple execution pipelines, each of which is coupled to a first input section for receiving input data for pixel processing and a second input section for receiving input data for vertex processing and to a first output section for stori... | 05/08/2012 |
| 8169789 | Graphics processing unit stiffening frame Apparatus and methods for mounting of a processor coupled to a circuit board include use of a frame disposed around the processor. The frame decreases flexibility of the circuit board around the processor. Further, the frame may act as a mechanical stop limiting til... | 05/01/2012 |
| 8169467 | System, method, and computer program product for increasing an LCD display vertical blanking interval A system, method, and computer program product are provided for enhancing a viewing experience when display content is viewed utilizing stereo glasses. In use, display content is received for being outputted utilizing a display. Further, a duration of a vertical bla... | 05/01/2012 |
| 8169437 | Distributed tessellation topology generator A system and method for dividing three-dimensional patches into tasks for processing receives control points defining a three dimensional patch and determines if a number of vertices of the three dimensional patch is greater than a maximum value. When the number of ... | 05/01/2012 |
| 8161252 | Memory interface with dynamic selection among mirrored storage locations Devices and methods provide data from multiple storage locations to a processor. A data block containing data required by a processor is stored in two or more locations, e.g., in a local memory and a system memory, both of which are accessible to the processor's mem... | 04/17/2012 |
| 8160983 | Displaying resources based on shared contexts A user data engine residing on an endpoint machine generates a current user context reflecting a specific flow of operations performed by an end-user when interacting with a software application. A context engine residing on a sever machine compares the current user... | 04/17/2012 |
| 8159612 | Apparatus, system, and method for processing digital audio/video signals Apparatus, system, and method for processing digital audio/video signals are described. In one embodiment, a decoder is configured to process an input signal having an analog television format. The decoder includes a signal detector, and the signal detector is confi... | 04/17/2012 |
| 8159496 | Subdividing a shader program Methods and apparatus for subdividing a shader program into regions or “phases” of instructions identifiable by phase identifiers (IDs) inserted into the shader program are provided. The phase IDs may be used to constrain execution of the shader program to prohi... | 04/17/2012 |
| 8156404 | L2 ECC implementation One embodiment of the present invention sets forth a method for implementing ECC protection in an on-chip L2 cache. When data is written to or read from an external memory, logic within the L2 cache is configured to generate ECC check bits and store the ECC check bi... | 04/10/2012 |
| 8154556 | Multiple simultaneous unique outputs from a single display pipeline One embodiment of the present invention sets forth a system for generating multiple video output signals from a single video pipeline within a graphics processing unit. Pixel data from more than one display surface is retrieved and multiplexed before being transmitt... | 04/10/2012 |
| 8154554 | Unified assembly instruction set for graphics processing Systems and methods for providing a unified instruction set allow shader programs of different types to use a common instruction set. The unified instruction set provides easy access for new graphics hardware features and faster compile times for shader programs. Pr... | 04/10/2012 |
| 8151095 | System and method for context migration across CPU threads One embodiment of the present invention sets forth a technique for associating arbitrary parallel processing unit (PPU) contexts with a given central processing unit (CPU) thread. The technique introduces two operators used to manage the PPU contexts. The first oper... | 04/03/2012 |
| 8150455 | Method and system for integrating a computer mouse function in a mobile communication device A method and system are implemented for controlling the position of a cursor on a display screen of a remote host device with a mobile communication device. The method comprises establishing a communication link between the mobile communication device and the select... | 04/03/2012 |
| 8149247 | Method and system for blending rendered images from multiple applications One embodiment of the present invention sets forth a method, which includes the steps of generating a first rendered image associated with a first application, independently generating a second rendered image associated with a second application, applying a first se... | 04/03/2012 |
| 8149243 | 3D graphics API extension for a packed float image format A three dimensional (3D) graphics applications programming interface (API) extension provides support for specifying images in a packed float format. In the packed float format, floating point values of three color components are represented as N bits, where N is le... | 04/03/2012 |
| 8149234 | Picture processing using a hybrid system configuration A system is presented that is configured to reduce power consumption when performing processing tasks. The system includes a first processing entity capable of performing a set of operations, and a second processing entity configured to consume less power than the f... | 04/03/2012 |
| 8140608 | Pipelined integer division using floating-point reciprocal One embodiment of the present invention sets forth a technique for performing fast integer division using commonly available arithmetic operations. The technique may be implemented in a two-stage process using a single-precision floating point reciprocal in conjunct... | 03/20/2012 |
| 8139073 | Early compression tag lookup for memory accesses Systems and methods for determining a compression tag state prior to memory client arbitration may reduce the latency for memory accesses. A compression tag is associated with each portion of a surface stored in memory and indicates whether or not the data stored in... | 03/20/2012 |
| 8139071 | Buffering unit to support graphics processing operations An apparatus and method for buffering graphics data are described. In one embodiment, a graphics processing apparatus includes a storage unit and a reorder control unit that is connected to the storage unit. The reorder control unit is configured to coordinate stora... | 03/20/2012 |
| 8139069 | Method and system for improving data coherency in a parallel rendering system A method and system for improving data coherency in a parallel rendering system is disclosed. Specifically, one embodiment of the present invention sets forth a method for managing a plurality of independently processed texture streams in a parallel rendering system... | 03/20/2012 |
| 8135964 | Apparatus, system, method, and computer program product for executing a program utilizing a processor to generate keys for decrypting content An apparatus, system, method, and computer program product are provided for executing a program provided a second party utilizing a processor to generate keys for decrypting content of a third party. In operation, content and a program to confidentially generate key... | 03/13/2012 |
| 8135926 | Cache-based control of atomic operations in conjunction with an external ALU block One embodiment of the invention sets forth a mechanism for efficiently processing atomic operations transmitted from multiple general processing clusters to an L2 cache. A tag look-up unit tracks the availability of each cache line in the L2 cache, reserves the nece... | 03/13/2012 |
| 8135885 | Data packer for packing and aligning write data A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower ba... | 03/13/2012 |
| 8135842 | Internet jack The claimed invention herein provides a simple, economical, and safe way to connect a new class of Internet-ready devices and appliances to the Internet without the use of a personal computer (PC). The claimed invention herein provides an Internet dial-tone, so to s... | 03/13/2012 |
| 8134928 | Technique for identifying a failed network interface card within a team of network interface cards A method for identifying a failed network interface card in a system having two NICs configured as a team includes the steps of transmitting a first data packet from the first NIC to a third NIC, wherein the third NIC is not a member of the team, and transmitting a ... | 03/13/2012 |
| 8134570 | System and method for graphics attribute packing for pixel shader usage A system, method and computer program product are provided for packing graphics attributes. In use, a plurality of graphics attributes is identified. Such graphics attributes are packed, such that the packed graphics attributes are capable of being processed utilizi... | 03/13/2012 |
| 8134568 | Frame buffer region redirection for multiple graphics adapters A system and method for representing multiple prefetchable memory resources, such as frame buffers coupled to graphics devices, as a unified prefetchable memory space for access by a software application. A graphics surface may be processed by multiple graphics devi... | 03/13/2012 |
| 8134567 | Active raster composition and error checking in hardware One embodiment of the present invention sets forth a system for computing and error checking configuration parameters related to raster image generation within a graphics processing unit. Input parameters are validated by a hardware-based error checking engine. A ha... | 03/13/2012 |
| 8134566 | Unified assembly instruction set for graphics processing Systems and methods for providing a unified instruction set allow shader programs of different types to use a common instruction set. The unified instruction set provides easy access for new graphics hardware features and faster compile times for shader programs. Pr... | 03/13/2012 |
| 8134543 | System, method, and computer program product for driving a display utilizing a compensated refresh rate A system, method, and computer program product are provided for driving a display utilizing a compensated refresh rate. In use, a pixel clock is received. The present technique compensates for an error associated with the pixel clock. Further, a refresh rate is calc... | 03/13/2012 |
| 8132015 | Method and system for loading a secure firmware update on an adapter device of a computer system One embodiment of the present invention sets forth a method for loading a secure firmware update onto an adapter device in a computer system. The method includes the steps of sending a duplet of encrypted data conveying a same portion of an encrypted update image al... | 03/06/2012 |
| 8131931 | Configurable cache occupancy policy One embodiment of the invention is a method for evicting data from an intermediary cache that includes the steps of receiving a command from a client, determining that there is a cache miss relative to the intermediary cache, identifying one or more cache lines with... | 03/06/2012 |
| 8131770 | System, method, and computer program product for importance sampling of partitioned domains A system, method, and computer program product are provided for importance sampling of partitioned domains. In operation, a domain is partitioned into a plurality of sets. Additionally, a probability is assigned to each of the plurality of sets. Furthermore, samples... | 03/06/2012 |
