"The abolishment of pain in surgery is a chimera. It is absurd to go on seeking it...knife and pain are two words in surgery that must forever be associated in the consciousness of the patient."
Dr. Alfred Velpeau, French surgeon ; 1839
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| Number | Title | Issue Date |
| 5629604 | Computer power supply system A power supply system, for example, for use with a portable personal computer, includes a smart battery pack and a charging system. The smart battery pack is provided with a dedicated microcontroller for controlling the charging level of the battery charg... | 05/13/1997 |
| 5596713 | Method to prevent data loss in an electrically erasable read only memory An apparatus and method for tracking and interception of instructions as they are presented to the memory, selectively passing harmless data to the device and disallowing the sequences which instruct the device to perform harmful functions, such as self-e... | 01/21/1997 |
| 5596480 | Split rotatable keyboard An adjustable keyboard assembly for a portable personal computer includes a keyboard, split along a predetermined breakline defining two keyboard sections, removable from the portable personal computer. In order to facilitate angular positioning of the ke... | 01/21/1997 |
| 5574866 | Method and apparatus for providing a data write signal with a programmable duration A control circuit which allows computer systems to modify signal timing relationships in the hardware via programmable ports in the system, thereby allowing timing adjustments to be made without effecting motherboard hardware. The control circuit includes... | 11/12/1996 |
| 5566383 | Drive platform assembly with rotatable mounting brackets and automatic grounding bracket A drive platform assembly for a personal computer for carrying both floppy disc drives and hard disc drives which facilitates the installation and replacement of such disc drives. The drive platform assembly includes a drive platform and an expansion plat... | 10/15/1996 |
| 5561361 | Computer power supply and battery recharging system A power supply system, for example, for use with a portable personal computer, includes a smart battery pack and a charging system. The smart battery pack is provided with a dedicated microcontroller for controlling the charging level of the battery charg... | 10/01/1996 |
| 5557782 | Flexible deterministic state machine A computer system has a memory and has a processor coupled to the memory, the processor having an access control arrangement for delaying completion of a memory access until the occurrence of a control signal. A deterministic circuit coupled to the-proces... | 09/17/1996 |
| 5551033 | Apparatus for maintaining one interrupt mask register in conformity with another in a manner invisible to an executing program A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches ... | 08/27/1996 |
| 5541490 | Computer power supply system A power supply system, for example, for use with a portable personal computer, includes a smart battery pack and a charging system. The smart battery pack is provided with a dedicated microcontroller for controlling the charging level of the battery charg... | 07/30/1996 |
| 5522069 | Symmetric multiprocessing system with unified environment and distributed system functions A symmetric multiprocessing system with a unified environment and distributed system functions provides unified address space for all functional units in the system while distributing the execution of various system functions over the functional units of ... | 05/28/1996 |
| 5517648 | Symmetric multiprocessing system with unified environment and distributed system functions A symmetric multiprocessing system with a unified environment and distributed system functions provides unified address space for all functional units in the system while distributing the execution of various system functions over the functional units of ... | 05/14/1996 |
| 5498971 | Method and control circuit for measuring the temperature of an integrated circuit A method and circuit for relatively accurately measuring the die temperature of an IC, such as a microprocessor, by sensing one or more internal circuit elements which have an electrical parameter which varies as a function of temperature, such as an inpu... | 03/12/1996 |
| 5460547 | Port replicator A port replicator is disclosed that provides for the efficient connecting and disconnecting of peripheral devices to a computer. A replicator port connector is provided on a portable computer that duplicates the pins of a other peripheral connectors on th... | 10/24/1995 |
| 5446904 | Suspend/resume capability for a protected mode microprocessor A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches ... | 08/29/1995 |
| 5446403 | Power on reset signal circuit with clock inhibit and delayed reset A control circuit inhibits the CLOCK input to the CPU during power-up to prevent newer submicron CPUs from locking up during a power-up condition. The control circuit also provides a delayed control signal representing that the power supply has stabilized... | 08/29/1995 |
| 5394527 | Method and apparatus facilitating use of a hard disk drive in a computer system having suspend/resume capability A computer system has a processing unit with suspend/resume capability, a memory, and a hard disk drive. In response to a first command from the processor, the hard disk drive sends its status to the processor and the processor stores it in the memory. In... | 02/28/1995 |
| 5363486 | Variable size queue circuit for buffering data transfers from a processor to a memory A computer system includes a memory capable of storing a plurality of data words, and a central processing unit for outputting data words to be stored in the memory. A method and apparatus for facilitating transfer of the data words from the central proce... | 11/08/1994 |
| 5353416 | CPU lock logic for corrected operation with a posted write array A shared bus arbitration system is disclosed which provides logic allowing multiple processors to co-exist on a common bus. In the present invention, the host processor is isolated from the bus by a posted write array or write buffer. The arbitration syst... | 10/04/1994 |
| 5317721 | Method and apparatus to disable ISA devices for EISA addresses outside the ISA range A computer system includes a system bus having a plurality of address lines and having a first control line. A connector is coupled to the address lines and the first control line, and can removably receive a circuit card which can accept and/or generate ... | 05/31/1994 |
| 5303352 | Dual connector port for bus master card A computer system includes a control circuit having a request input, and a pair of connectors which are electrically coupled to the control circuit and are each connected to the request input of the control circuit, each connector being capable of removab... | 04/12/1994 |
| 5303171 | System suspend on lid close and system resume on lid open A portable computer system includes a housing, a lid supported on the housing for movement between open and closed positions, a keyboard supported on the housing below the lid, and a display provided on the lid. When the lid is opened, the keyboard is acc... | 04/12/1994 |
| 5297270 | Programmable cache memory which associates each section of main memory to be cached with a status bit which enables/disables the caching accessibility of the particular section, and with the capability of functioning with memory areas of varying size A system includes a main memory having a plurality of sections which each include a plurality of selectively addressable storage locations, a cache memory, and an accessing arrangement for successively requesting data from respective locations in the main... | 03/22/1994 |
| 5291588 | Control system and method for multiple rate disk drive data transfer with a single oscillator A computer disk drive control adapts the rate of data transfer between a disk drive and a CPU to correspond to one of three industry standard transfer rates. The timing of disk controller signals is provided for by a two phase state machine that receives ... | 03/01/1994 |
| 5283889 | Hardware based interface for mode switching to access memory above one megabyte A relatively fast system control processor, such as an Intel 8051, is substituted for an Intel 8042 microprocessor in a PC/AT type compatible personal computer. In one embodiment of the invention, a System Control Processor Interface (SCPI) is provided be... | 02/01/1994 |
| 5280621 | Personal computer having dedicated processors for peripheral devices interconnected to the CPU by way of a system control processor A plurality of processors form a network used to communicate with one or more peripheral devices and the system control processor. One processor is dedicated to at least one peripheral device. Since the system control processor is not burdened with the re... | 01/18/1994 |
| 5261083 | Floppy disk controller interface for suppressing false verify cycle errors A system includes a system bus having data lines, an acknowledge line, an enable line, and a control line, a data storage device, a controller circuit, and an arrangement coupling the system bus, controller circuit and data storage device. The system bus ... | 11/09/1993 |
| 5257143 | Method and apparatus for positioning head of disk drive using zone-bit-recording A zone-bit-recording disk drive has a rotating platter with a surface which is divided into at least two zones each having a respective different number of angularly spaced sectors therein. A method and apparatus for positioning the head relative to the p... | 10/26/1993 |
| 5253352 | Method and apparatus for pipelining cache accesses using anticipatory initiation of cache read A high speed memory component, such as a cache RAM (random access memory), has a bidirectional data line and a control line (CDRAMOE) which, when respectively set to first and second electrical states, causes the memory component to respectively output da... | 10/12/1993 |
| 5253350 | Method of combining lower order and translated upper order bits to address ROM within a range reserved for other devices In response to an address decoded in a preselected range, a multiplexer combines translated high order address bits with CPU-generated low order address bits to access random access memory, especially reserved range random access memory. Otherwise, the mu... | 10/12/1993 |
| 5214364 | Microprocessor-based antenna rotor controller Apparatus and method for automatically controlling the rotation of an angularly positionable antenna from one angular position to a desired new angular position. The disclosed technique provides the user with a list of destination indicia, each of which c... | 05/25/1993 |
| 5157776 | High speed memory for microcomputer systems A method and main memory system that provides a processor cache includes. Dual-port random access memory devices used for main memory, with one port providing typical random access and a second port being associated with an internal shift register that co... | 10/20/1992 |
| 5146578 | Method of varying the amount of data prefetched to a cache memory in dependence on the history of data requests A method of dynamically prefetching data for a cache memory is controlled by the past history of data requests. If the previous fetch and current fetch request are not sequential, no data is prefetched. If the previous fetch and current fetch request are ... | 09/08/1992 |
| 5136694 | Method and apparatus facilitating communication between two keyboards and a single processor A computing device includes a system control processor, a built-in keyboard having a plurality of keys, a connector which facilitates connection of an external keyboard or keypad to the device, an electronic switch which is controlled by the internal keyb... | 08/04/1992 |
| 5129069 | Method and apparatus for automatic memory configuration by a computer A memory system includes a memory unit with plural addressable storage locations, a connector arrangement for detachably electrically coupling the memory unit to a computer, and a decoding arrangement for determining whether a computer memory address is w... | 07/07/1992 |
| 5123092 | External expansion bus interface A computer bus interface suited to connecting an expansion bus to a computer's internal bus. The interface is capable of selecting and deselecting any devices coupled to the expansion bus by enabling and disabling buffers which intercept signals between t... | 06/16/1992 |
| 5072450 | Method and apparatus for error detection and localization A computer system reads data from selected locations in a memory while each address applied to the memory is temporarily stored in a register. If a data error is detected, two flipflops are set, one of which can generate and interrupt the central processi... | 12/10/1991 |
| 5064378 | Mounting of DRAMs of different sizes and pinouts within limited footprint Four parallel, spaced arrays of apertures are provided in a printed circuit (PC) board to accommodate mounting of 16- and 18-pin dynamic random access memories (DRAMs) within a minimum area footprint. First and second 8-aperture linear arrays are provided... | 11/12/1991 |
| 5045960 | Self-aligning guide and track for removable disk drive module A slide guide for a removable computer drive module that permits the module to float as a self aligning connector engages. A computer housing has tracks that guide the module as it is inserted and release the forward end of the module just before the conn... | 09/03/1991 |
| 5042003 | Memory usage system An improved means and method for expanded memory system access and control is disclosed. A logic array in the expanded memory control circuitry which accesses and controls up to two separate expansion boards through the use of static random access memory ... | 08/20/1991 |