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| Number | Title | Issue Date |
| 5850537 | Pipe lined static router and scheduler for configurable logic system performing simultaneous communications and computation A configurable logic system programmed to model a logic design comprises an array of programmable logic modules each configured to perform a partition block of the logic design and a module interconnect providing connections between the modules. The inter... | 12/15/1998 |
| 5847578 | Programmable multiplexing input/output port A programmable logic circuit includes a programmable logic array which generates a plurality of output signals for output from a single port on the programmable logic circuit, and which processes a plurality of input signals received from a single port on... | 12/08/1998 |
| 5802348 | Logic analysis system for logic emulation systems A portion of a logic emulation system is configured to sample logic values from the portion of the emulation system that is used to emulate the user digital logic design. These sampled values are then multiplexed by the emulation system to a logic analysi... | 09/01/1998 |
| 5659716 | Pipe-lined static router and scheduler for configurable logic system performing simultaneous communications and computation A configurable logic system programmed to model a logic design comprises an array of programmable logic modules each configured to perform a partition block of the logic design and a module interconnect providing connections between the modules. The inter... | 08/19/1997 |
| 5649176 | Transition analysis and circuit resynthesis method and device for digital circuit modeling A method of configuring a configurable logic system, including a single or multi-FPGA network, is disclosed in which an internal clock signal is defined that has a higher frequency than timing signals the system receives from the environment in which it i... | 07/15/1997 |
